Регистры Allwinner H616

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TMR_IRQ_STA_REG
3.6.5. Timer Status Register - адрес: 0x3009004 (смещение: 0x0004)

Таймер: список регистров



31 ||||||||||||||||| 16
15 ||||||||||||||||| 00

  Unused

Bits 31 : 2

  TMR1_IRQ_PEND

Bit 1
R/W1C
0x0

Timer 1 IRQ Pending. Setting 1 to the bit will clear it.
0: No effect
1: Pending, timer 1 interval value is reached


  TMR0_IRQ_PEND

Bit 0
R/W1C
0x0

Timer 0 IRQ Pending. Setting 1 to the bit will clear it.
0: No effect
1: Pending, timer 0 interval value is reached



Команда U-Boot для чтения регистра

md 3009004 1



Bit fields structure

typedef union  tmr_irq_sta_reg
{
  struct
  {
   unsigned tmr0_irq_pend : 1;
   unsigned tmr1_irq_pend : 1;
   unsigned unused0 : 30;
  } b;
   unsigned long w;
} TMR_IRQ_STA_REG
   

Allwinner H616 Manual