Таймер: список регистров

  Unused

  TMR0_MODE

Timer 0 mode
0: Continuous mode. When interval value reached, the timer will not disable
automatically.
1: Single mode. When interval value reached, the timer will disable
automatically.

  TMR0_CLK_PRES

Select the pre-scale of timer 0 clock source.
000: /1
001: /2
010: /4
011: /8
100: /16
101: /32
110: /64
111: /128

  TMR0_CLK_SRC

00:LOSC
01: OSC24M
10: /
11: /

  TMR0_RELOAD

Timer 0 Reload
0: No effect
1: Reload timer 0 Interval value
After the bit is set, it can not be written again before it is cleared automatically.

  TMR0_EN

Timer 0 Enable
0: Stop/Pause
1: Start
If the timer starts, it will reload the interval value to internal register, and the
current counter will count from interval value to 0.


If the current counter does not reach the zero, the timer enable bit is set to
0 , the current value counter will pause. At least wait for 2 cycles, the start bit
can be set to 1.
In timer pause state, the interval value register can be modified. If the timer
starts again, and the software hopes the current value register to down-count
from the new interval value, the reload bit and the enable bit should be set to
1 at the same time.

Команда U-Boot для чтения регистра

Bit fields structure

typedef union  tmr0_ctrl_reg
{
  struct
  {
   unsigned tmr0_en : 1;
   unsigned tmr0_reload : 1;
   unsigned tmr0_clk_src : 2;
   unsigned tmr0_clk_pres : 3;
   unsigned tmr0_mode : 1;
   unsigned unused0 : 24;
  } b;
   unsigned long w;
} TMR0_CTRL_REG