31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00
Unused
Bits
31 :
8
WDOG_INTV_VALUE
Bits
7 :
4R/W
0x0
Watchdog Interval Value
Watchdog clock source is OSC24M/750. If the clock source is turned off,
Watchdog will not work.
0000: 16000 cycles (0.5s)
0001: 32000 cycles (1s)
0010: 64000 cycles (2s)
0011: 96000 cycles (3s)
0100: 128000 cycles (4s)
0101: 160000 cycles (5s)
0110: 192000 cycles (6s)
0111: 256000 cycles (8s)
1000: 320000 cycles (10s)
1001: 384000 cycles (12s)
1010: 448000 cycles (14s)
1011: 512000 cycles (16s)
Others: Reserved
Unused
Bits
3 :
1
WDOG_EN
Bit
0R/W1S
0x0
Watchdog Enable
0: No effect
1: Enable the Watchdog