DMA_IRQ_EN_REG0 Прямой доступ к памяти: список регистров 31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16 15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00 Unused Bit 31DMA7_QUEUE_IRQ_EN Bit 30R/W 0x0 DMA 7 Queue End Transfer Interrupt Enable DMA7_PKG_IRQ_EN Bit 29R/W 0x0 DMA 7 Package End Transfer Interrupt Enable DMA7_HLAF_IRQ_EN Bit 28R/W 0x0 DMA 7 Half Package Transfer Interrupt Enable Unused Bit 27DMA6_QUEUE_IRQ_EN Bit 26R/W 0x0 DMA 6 Queue End Transfer Interrupt Enable DMA6_PKG_IRQ_EN Bit 25R/W 0x0 DMA 6 Package End Transfer Interrupt Enable DMA6_HLAF_IRQ_EN Bit 24R/W 0x0 DMA 6 Half Package Transfer Interrupt Enable Unused Bit 23DMA5_QUEUE_IRQ_EN Bit 22R/W 0x0 DMA 5 Queue End Transfer Interrupt Enable DMA5_PKG_IRQ_EN Bit 21R/W 0x0 DMA 5 Package End Transfer Interrupt Enable DMA5_HLAF_IRQ_EN Bit 20R/W 0x0 DMA 5 Half package Transfer Interrupt Enable Unused Bit 19DMA4_QUEUE_IRQ_EN Bit 18R/W 0x0 DMA 4 Queue End Transfer Interrupt Enable. DMA4_PKG_IRQ_EN Bit 17R/W 0x0 DMA 4 Package End Transfer Interrupt Enable DMA4_HLAF_IRQ_EN Bit 16R/W 0x0 DMA 4 Half Package Transfer Interrupt Enable Unused Bit 15DMA3_QUEUE_IRQ_EN Bit 14R/W 0x0 DMA 3 Queue End Transfer Interrupt Enable DMA3_PKG_IRQ_EN Bit 13R/W 0x0 DMA 3 Package End Transfer Interrupt Enable DMA3_HLAF_IRQ_EN Bit 12R/W 0x0 DMA 3 Half Package Transfer Interrupt Enable Unused Bit 11DMA2_QUEUE_IRQ_EN Bit 10R/W 0x0 DMA 2 Queue End Transfer Interrupt Enable DMA2_PKG_IRQ_EN Bit 9R/W 0x0 DMA 2 Package End Transfer Interrupt Enable DMA2_HLAF_IRQ_EN Bit 8R/W 0x0 DMA 2 Half Package Transfer Interrupt Enable Unused Bit 7DMA1_QUEUE_IRQ_EN Bit 6R/W 0x0 DMA 1 Queue End Transfer Interrupt Enable DMA1_PKG_IRQ_EN Bit 5R/W 0x0 DMA 1 Package End Transfer Interrupt Enable. DMA1_HLAF_IRQ_EN Bit 4R/W 0x0 DMA 1 Half Package Transfer Interrupt Enable Unused Bit 3DMA0_QUEUE_IRQ_EN Bit 2R/W 0x0 DMA 0 Queue End Transfer Interrupt Enable DMA0_PKG_IRQ_EN Bit 1R/W 0x0 DMA 0 Package End Transfer Interrupt Enable DMA0_HLAF_IRQ_EN Bit 0R/W 0x0 DMA 0 Half Package Transfer Interrupt Enable Команда U-Boot для чтения регистра md 3002000 1Bit fields structure
typedef union dma_irq_en_reg0
{
struct
{
unsigned dma0_hlaf_irq_en : 1;
unsigned dma0_pkg_irq_en : 1;
unsigned dma0_queue_irq_en : 1;
unsigned unused0 : 1;
unsigned dma1_hlaf_irq_en : 1;
unsigned dma1_pkg_irq_en : 1;
unsigned dma1_queue_irq_en : 1;
unsigned unused1 : 1;
unsigned dma2_hlaf_irq_en : 1;
unsigned dma2_pkg_irq_en : 1;
unsigned dma2_queue_irq_en : 1;
unsigned unused2 : 1;
unsigned dma3_hlaf_irq_en : 1;
unsigned dma3_pkg_irq_en : 1;
unsigned dma3_queue_irq_en : 1;
unsigned unused3 : 1;
unsigned dma4_hlaf_irq_en : 1;
unsigned dma4_pkg_irq_en : 1;
unsigned dma4_queue_irq_en : 1;
unsigned unused4 : 1;
unsigned dma5_hlaf_irq_en : 1;
unsigned dma5_pkg_irq_en : 1;
unsigned dma5_queue_irq_en : 1;
unsigned unused5 : 1;
unsigned dma6_hlaf_irq_en : 1;
unsigned dma6_pkg_irq_en : 1;
unsigned dma6_queue_irq_en : 1;
unsigned unused6 : 1;
unsigned dma7_hlaf_irq_en : 1;
unsigned dma7_pkg_irq_en : 1;
unsigned dma7_queue_irq_en : 1;
unsigned unused7 : 1;
} b;
unsigned long w;
} DMA_IRQ_EN_REG0
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