NDFC_DATA_BLOCK_MASK Контроллер Nand Flash (NDFC): список регистров 31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16 15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00 NDFC_DATA_BLOCK_MASK Bit 31R/W 0x0 It is used to indicate the data block 31 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 30R/W 0x0 It is used to indicate the data block 30 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 29R/W 0x0 It is used to indicate the data block 29 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 28R/W 0x0 It is used to indicate the data block 28 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 27R/W 0x0 It is used to indicate the data block 27 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 26R/W 0x0 It is used to indicate the data block 26 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 25R/W 0x0 It is used to indicate the data block 25 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 24R/W 0x0 It is used to indicate the data block 24 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 23R/W 0x0 It is used to indicate the data block 23 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 22R/W 0x0 It is used to indicate the data block 22 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 21R/W 0x0 It is used to indicate the data block 21 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 20R/W 0x0 It is used to indicate the data block 20 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 19R/W 0x0 It is used to indicate the data block 19 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 18R/W 0x0 It is used to indicate the data block 18 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 17R/W 0x0 It is used to indicate the data block 17 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 16R/W 0x0 It is used to indicate the data block 16 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 15R/W 0x0 It is used to indicate the data block 15 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 14R/W 0x0 It is used to indicate the data block 14 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 13R/W 0x0 It is used to indicate the data block 13 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 12R/W 0x0 It is used to indicate the data block 12 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 11R/W 0x0 It is used to indicate the data block 11 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 10R/W 0x0 It is used to indicate the data block 10 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 9R/W 0x0 It is used to indicate the data block 9 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 8R/W 0x0 It is used to indicate the data block 8 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 7R/W 0x0 It is used to indicate the data block 7 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 6R/W 0x0 It is used to indicate the data block 6 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 5R/W 0x0 It is used to indicate the data block 5 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 4R/W 0x0 It is used to indicate the data block 4 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 3R/W 0x0 It is used to indicate the data block 3 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 2R/W 0x0 It is used to indicate the data block 2 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 1R/W 0x0 It is used to indicate the data block 1 should be written or read during batch NDFC_DATA_BLOCK_MASK Bit 0R/W 0x0 It is used to indicate the data block 0 should be written or read during batch Команда U-Boot для чтения регистра md 401101c 1Bit fields structure
typedef union ndfc_data_block_mask
{
struct
{
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
unsigned ndfc_data_block_mask : 1;
} b;
unsigned long w;
} NDFC_DATA_BLOCK_MASK
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