Регистры Allwinner H616

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NDFC_RDATA_STA_CTL
5.2.5. NDFC Read Data Status Control Register - адрес: 0x4011044 (смещение: 0x0044)

Контроллер Nand Flash (NDFC): список регистров



31 ||||||||||||||||| 16
15 ||||||||||||||||| 00

  Unused

Bits 31 : 25

  NDFC_RDATA_STA_EN

Bit 24
R/W
0x1

0: Disable to count the number of bit 1 and bit 0 during current read operation
1: Enable to count the number of bit 1 and bit 0 during current read operation
The number of bit 1 and bit 0 during current read operation can be used to check
whether a page is blank or bad.


  Unused

Bits 23 : 19

  NDFC_RDATA_STA_TH

Bits 18 : 0
R/W
0x0

The threshold value to generate data status
If the number of bit 1 during current read operation is less than or equal to
threshold value, the bit 13 of NDFC_ST register will be set.
If the number of bit 0 during current read operation is less than or equal to
threshold value, the bit 12 of NDFC_ST register will be set.



Команда U-Boot для чтения регистра

md 4011044 1



Bit fields structure

typedef union  ndfc_rdata_sta_ctl
{
  struct
  {
   unsigned ndfc_rdata_sta_th : 19;
   unsigned unused0 : 5;
   unsigned ndfc_rdata_sta_en : 1;
   unsigned unused1 : 7;
  } b;
   unsigned long w;
} NDFC_RDATA_STA_CTL
   

Allwinner H616 Manual