SMHC_INTMASK Хост-контроллер SD / MMC (SMHC): список регистров 31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16 15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00 CARD_REMOVAL_INT_EN Bit 31R/W 0x0 Card Removed Interrupt Enable CARD_INSERT_INT_EN Bit 30R/W 0x0 Card Inserted Interrupt Enable Unused Bits 29 : 17SDIO_INT_EN Bit 16R/W 0x0 SDIO Interrupt Enable DEE_INT_EN Bit 15R/W 0x0 Data End-bit Error Interrupt Enable ACD_INT_EN Bit 14R/W 0x0 Auto Command Done Interrupt Enable DSE_BC_INT_EN Bit 13R/W 0x0 Data Start Error Interrupt Enable CB_IW_INT_EN Bit 12R/W 0x0 Command Busy and Illegal Write Interrupt Enable FU_FO_INT_EN Bit 11R/W 0x0 FIFO Underrun/Overflow Interrupt Enable DSTO_VSD_INT_EN Bit 10R/W 0x0 Data Starvation Timeout/V1.8 Switch Done Interrupt Enable RTO_BACK_INT_EN Bit 9R/W 0x0 DTO_BDS_INT_EN Bit 8R/W 0x0 Data Timeout/Boot Data Start Interrupt Enable DCE_INT_EN Bit 7R/W 0x0 Data CRC Error Interrupt Enable RCE_INT_EN Bit 6R/W 0x0 Response CRC Error Interrupt Enable DRR_INT_EN Bit 5R/W 0x0 Data Receive Request Interrupt Enable DTR_INT_EN Bit 4R/W 0x0 Data Transmit Request Interrupt Enable DTC_INT_EN Bit 3R/W 0x0 Data Transfer Complete Interrupt Enable CC_INT_EN Bit 2R/W 0x0 Command Complete Interrupt Enable RE_INT_EN Bit 1R/W 0x0 Response Error Interrupt Enable Unused Bit 0Команда U-Boot для чтения регистра md 4020030 1md 4021030 1 md 4022030 1 Bit fields structuretypedef union smhc_intmask { struct { unsigned unused0 : 1; unsigned re_int_en : 1; unsigned cc_int_en : 1; unsigned dtc_int_en : 1; unsigned dtr_int_en : 1; unsigned drr_int_en : 1; unsigned rce_int_en : 1; unsigned dce_int_en : 1; unsigned dto_bds_int_en : 1; unsigned rto_back_int_en : 1; unsigned dsto_vsd_int_en : 1; unsigned fu_fo_int_en : 1; unsigned cb_iw_int_en : 1; unsigned dse_bc_int_en : 1; unsigned acd_int_en : 1; unsigned dee_int_en : 1; unsigned sdio_int_en : 1; unsigned unused1 : 13; unsigned card_insert_int_en : 1; unsigned card_removal_int_en : 1; } b; unsigned long w; } SMHC_INTMASK |
![]() |