Хост-контроллер SD / MMC (SMHC): список регистров

  CARD_REMOVAL

Card Removed
This is write-1-to-clear bits.

  CARD_INSERT

Card Inserted
This is write-1-to-clear bits.

  Unused

  SDIOI_INT

SDIO Interrupt
This is write-1-to-clear bits.

  DEE

Data End-bit Error
When set during receiving data, it means that host controller does not receive valid data end bit.
When set during transmitting data, it means that host controller does not
receive CRC status taken. This is write-1-to-clear bits.

  ACD

Auto Command Done
When set, it means auto stop command(CMD12) completed.
This is write 1 to clear bits.

  DSE_BC

Data Start Error
When set during receiving data, it means that host controller found a error start bit.
It is valid at 4-bit or 8-bit bus mode. When it set, host finds
start bit at data0, but does not find start bit at some or all of the other data lines.
When set during transmitting data, it means that busy signal is cleared.
This is write-1-to-clear bits.

  CB_IW

Command Busy and Illegal Write
This is write-1-to-clear bits.

  FU_FO

FIFO Underrun/Overflow
This is write-1-to-clear bits.

  DSTO_VSD

Data Starvation Timeout/V1.8 Switch Done
This is write-1-to-clear bits.

  DTO_BDS

Data Timeout/Boot Data Start
When set during receiving data, it means host does not find start bit on
data0.
This is write-1-to-clear bits.

  RTO_BACK

Response Timeout/Boot ACK Received
This is write-1-to-clear bits.

  DCE

Data CRC Error
When set during receiving data, it means that the received data have data CRC error.
When set during transmitting data, it means that the received CRC status taken is negative.
This is write-1-to-clear bits.

  RCE

Response CRC Error
This is write-1-to-clear bits.

  DRR

Data Receive Request
When set, it means that there are enough data in FIFO during receiving data.
This is write-1-to-clear bits.

  DTR

Data Transmit Request
When set, it means that there are enough space in FIFO during transmitting data.
This is write-1-to-clear bits.

  DTC

Data Transfer Complete
When set, it means that current command completes even through error occurs.
This is write-1-to-clear bits.

  CC_

Command Complete
When set, it means that current command completes even through error occurs.
This is write-1-to-clear bits.

  RE_

Response Error
When set, Transmit Bit error or End Bit error or CMD Index error may occur.
This is write-1-to-clear bits.

  Unused

Команда U-Boot для чтения регистра

Bit fields structure

typedef union  smhc_rintsts
{
  struct
  {
   unsigned unused0 : 1;
   unsigned re_ : 1;
   unsigned cc_ : 1;
   unsigned dtc : 1;
   unsigned dtr : 1;
   unsigned drr : 1;
   unsigned rce : 1;
   unsigned dce : 1;
   unsigned rto_back : 1;
   unsigned dto_bds : 1;
   unsigned dsto_vsd : 1;
   unsigned fu_fo : 1;
   unsigned cb_iw : 1;
   unsigned dse_bc : 1;
   unsigned acd : 1;
   unsigned dee : 1;
   unsigned sdioi_int : 1;
   unsigned unused1 : 13;
   unsigned card_insert : 1;
   unsigned card_removal : 1;
  } b;
   unsigned long w;
} SMHC_RINTSTS