Хост-контроллер SD / MMC (SMHC): список регистров

  Unused

  BSIZE_OF_TRANS

Burst Size of Multiple Transaction
000: 1 transfers
001: 4
010: 8
011: 16
Others: Reserved

It should be programmed same as DMA controller multiple transaction
size. The units for transfers are the DWORD. A single transfer would be
signaled based on this value. Value should be sub-multiple of (RX_TL + 1)
and (FIFO_DEPTH - TX_TL)
FIFO_DEPTH = 256, FIFO_SIZE = 256 * 32 = 1K
Recommended:
MSize = 16, TX_TL = 240, RX_TL = 15 (for SMHC2)
MSize = 8, TX_TL = 248, RX_TL = 7 (for SMHC0,SMHC1)

  Unused

  RX_TL

RX Trigger Level
0x0~0xFE: RX Trigger Level is 0~254
0xFF: Reserved
FIFO threshold when FIFO request host to receive data from FIFO. When
FIFO data level is greater than this value, DMA is request is raised if DMA
enabled, or RX interrupt bit is set if interrupt enabled. At the end of
packet, if the last transfer is less than this level, the value is ignored and
relative request will be raised as usual.
Recommended:
15 (means greater than 15, for SMHC2)
7 (means greater than 7, for SMHC0,SMHC1)

  Unused

  TX_TL

TX Trigger Level
0x1~0xFF: TX Trigger Level is 1~255
0x0: No trigger
FIFO threshold when FIFO requests host to transmit data to FIFO. When
FIFO data level is less than or equal to this value, DMA TX request is
raised if DMA enabled, or TX request interrupt bit is set if interrupt
enabled. At the end of packet, if the last transfer is less than this level,
the value is ignored and relative request will be raised as usual.
Recommended:
240(means less than or equal to 240, for SMHC2)
248(means less than or equal to 248, for SMHC0,SMHC1)

Команда U-Boot для чтения регистра

Bit fields structure

typedef union  smhc_fifoth
{
  struct
  {
   unsigned tx_tl : 8;
   unsigned unused0 : 8;
   unsigned rx_tl : 8;
   unsigned unused1 : 4;
   unsigned bsize_of_trans : 3;
   unsigned unused2 : 1;
  } b;
   unsigned long w;
} SMHC_FIFOTH