Регистры H616: Card Threshold Control Register

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

Unused

Bits 31 : 28

CARD_RD_THLD

Bits 27 : 16
R/W
0x0

Card Read Threshold Size

Unused

Bits 15 : 3

CARD_WR_THLD_ENB

Bit 2
R/W
0x0

Card Write Threshold Enable(HS400) - only for SMHC2
0: Card write threshold disabled
1: Card write threshold enabled
Host controller initiates write transfer only if card threshold amount of data is available in transmit FIFO

BCIG

Bit 1
R/W
0x0

Busy Clear Interrupt Generation (only for SMHC2)
0: Busy clear interrupt disabled
1: Busy clear interrupt enabled
The application can disable this feature if it does not want to wait for a Busy Clear Interrupt.

CARD_RD_THLD_ENB

Bit 0
R/W
0x0

Card Read Threshold Enable
0: Card read threshold disabled
1: Card read threshold enabled
Host controller initiates Read Transfer only if CARD_RD_THLD amount of
space is available in receive FIFO.

Bit fields structure

typedef union smhc_thld { struct { unsigned card_rd_thld_enb : 1; unsigned bcig : 1; unsigned card_wr_thld_enb : 1; unsigned unused0 : 13; unsigned card_rd_thld : 12; unsigned unused1 : 4; } b; unsigned long w; } SMHC_THLD