Unused Bits 31 : 5
STOP_CLK_CTRL Bits 4 : 1
R/W
0x3
Stop Clock Control
When receiving data, if CARD_RD_THLD_ENB is set and CARD_RD_THLD is
set same with BLK_SZ, the device clock may stop at block gap during data
receiving.
This field is used to control the position of stopping clock.
The value can be changed between 0x0 and 0xF, but actually the available
value and the position of stopping clock must be decided by the actual
situation.
The value increases one in this field is linked to one cycle(two cycles in DDR
mode) that the position of stopping clock moved up.
BYPASS_EN Bit 0
R/W
0x0
Bypass enable
When set, sample FIFO will be bypassed.
Note
The register is for SMHC2.
Команда U-Boot для чтения регистра md 4020104 1 md 4021104 1 md 4022104 1
Bit fields structure
typedef union smhc_sfc
{
struct
{
unsigned bypass_en : 1;
unsigned stop_clk_ctrl : 4;
unsigned unused0 : 27;
} b;
unsigned long w;
} SMHC_SFC
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