Регистры H616: IOMMU Out Of Order Control Register

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

Unused

Bits 31 : 7

MASTER6_OOO_CTRL

Bit 6
R/W
0x1

Master6 out-of-order control bit
0: Disable out-of-order
1: Enable out-of-order

MASTER5_OOO_CTRL

Bit 5
R/W
0x1

Master5 out-of-order control bit
0: Disable out-of-order
1: Enable out-of-order

MASTER4_OOO_CTRL

Bit 4
R/W
0x1

Master4 out-of-order control bit
0: Disable out-of-order
1: Enable out-of-order

MASTER3_OOO_CTRL

Bit 3
R/W
0x1

Master3 out-of-order control bit
0: Disable out-of-order
1: Enable out-of-order

MASTER2_OOO_CTRL

Bit 2
R/W
0x1

Master2 out-of-order control bit
0: Disable out-of-order
1: Enable out-of-order
Note: AI does not support out-of-order, the bit is invalid.

MASTER1_OOO_CTRL

Bit 1
R/W
0x1

Master1 out-of-order control bit
0: Disable out-of-order
1: Enable out-of-order

MASTER0_OOO_CTRL

Bit 0
R/W
0x1

Master0 out-of-order control bit
0: Disable out-of-order
1: Enable out-of-order

Bit fields structure

typedef union iommu_ooo_ctrl_reg { struct { unsigned master0_ooo_ctrl : 1; unsigned master1_ooo_ctrl : 1; unsigned master2_ooo_ctrl : 1; unsigned master3_ooo_ctrl : 1; unsigned master4_ooo_ctrl : 1; unsigned master5_ooo_ctrl : 1; unsigned master6_ooo_ctrl : 1; unsigned unused0 : 25; } b; unsigned long w; } IOMMU_OOO_CTRL_REG