Регистры H616: Data Strobe Delay Control Register (Only for SMHC2)

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

Unused

Bits 31 : 16

DS_DL_CAL_START

Bit 15
R/W
0x0

Data Strobe Delay Calibration Start
When set, start sample delay chain calibration.

DS_DL_CAL_DONE

Bit 14
R
0x0

Data Strobe Delay Calibration Done
When set, it means that sample delay chain calibration is done and the result
of calibration is shown in DS_DL.

DS_DL

Bits 13 : 8
R
0x20

Data Strobe Delay
It indicates the number of delay cells corresponding to current card clock.
The delay time generated by these delay cells is equal to the cycle of SMHC's
clock nearly.
This bit is valid only when SAMP_DL_CAL_DONE is set.

DS_DL_SW_EN

Bit 7
R/W
0x0

Sample Delay Software Enable

Unused

Bit 6

DS_DL_SW

Bits 5 : 0
R/W
0x0

Data Strobe Delay Software

Bit fields structure

typedef union smhc_ds_dl { struct { unsigned ds_dl_sw : 6; unsigned unused0 : 1; unsigned ds_dl_sw_en : 1; unsigned ds_dl : 6; unsigned ds_dl_cal_done : 1; unsigned ds_dl_cal_start : 1; unsigned unused1 : 16; } b; unsigned long w; } SMHC_DS_DL