EMAC_INT_EN Контроллер Ethernet: список регистров 31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16 15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00 Unused Bits 31 : 14RX_EARLY_INT_EN Bit 13R/W 0x0 Early Receive Interrupt RX_OVERFLOW_INT_EN Bit 12R/W 0x0 Receive Overflow Interrupt RX_TIMEOUT_INT_EN Bit 11R/W 0x0 Receive Timeout Interrupt RX_DMA_STOPPED_INT_EN Bit 10R/W 0x0 Receive DMA FSM Stopped Interrupt RX_BUF_UA_INT_EN Bit 9R/W 0x0 Receive Buffer Unavailable Interrupt RX_INT_EN Bit 8R/W 0x0 Receive Interrupt Unused Bits 7 : 6TX_EARLY_INT_EN Bit 5R/W 0x0 Early Transmit Interrupt TX_UNDERFLOW_INT_EN Bit 4R/W 0x0 Transmit Underflow Interrupt TX_TIMEOUT_INT_EN Bit 3R/W 0x0 Transmit Timeout Interrupt TX_BUF_UA_INT_EN Bit 2R/W 0x0 Transmit Buffer Available Interrupt TX_DMA_STOPPED_INT_EN Bit 1R/W 0x0 Transmit DMA FSM Stopped Interrupt TX_INT_EN Bit 0R/W 0x0 Transmit Interrupt Команда U-Boot для чтения регистра md 502000c 1md 503000c 1 Bit fields structure
typedef union emac_int_en
{
struct
{
unsigned tx_int_en : 1;
unsigned tx_dma_stopped_int_en : 1;
unsigned tx_buf_ua_int_en : 1;
unsigned tx_timeout_int_en : 1;
unsigned tx_underflow_int_en : 1;
unsigned tx_early_int_en : 1;
unsigned unused0 : 2;
unsigned rx_int_en : 1;
unsigned rx_buf_ua_int_en : 1;
unsigned rx_dma_stopped_int_en : 1;
unsigned rx_timeout_int_en : 1;
unsigned rx_overflow_int_en : 1;
unsigned rx_early_int_en : 1;
unsigned unused1 : 18;
} b;
unsigned long w;
} EMAC_INT_EN
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