Регистры H616: EMAC Transmit Flow Control Register

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

TX_FLOW_CTL_STA

Bit 31
R/W
0x0

This bit indicates a pause frame transmission is in progress.
When the configuration of flow control is ready, set this bit to transmit a pause frame in
full-duplex mode or activate the backpressure function. After completion of
transmission, this bit will be cleared automatically. Before write register
TX FLOW CTRL, this bit must be read as 0.

Unused

Bits 30 : 22

TX_PAUSE_FRM_SLOT

Bits 21 : 20
R/W
0x0

The threshold of the pause timer at which the input flow control signal is
checked for automatic retransmission of pause frame. The threshold values
should be always less than the PAUSE TIME

PAUSE_TIME

Bits 19 : 4
R/W
0x0

The pause time field in the transmitted control frame.

Unused

Bits 3 : 2

ZQP_FRM_EN

Bit 1
R/W
0x0

0: Disable
1: Enable
When set, enable the functionality to generate Zero-Quanta Pause control frame.

TX_FLOW_CTL_EN

Bit 0
R/W
0x0

TX Flow Control Enable
0: Disable
1: Enable
When set, enable flow control operation to transmit
pause frames in full-duplex mode, or enable the back-pressure operation in half-duplex mode.

Bit fields structure

typedef union emac_tx_flow_ctl { struct { unsigned tx_flow_ctl_en : 1; unsigned zqp_frm_en : 1; unsigned unused0 : 2; unsigned pause_time : 16; unsigned tx_pause_frm_slot : 2; unsigned unused1 : 9; unsigned tx_flow_ctl_sta : 1; } b; unsigned long w; } EMAC_TX_FLOW_CTL