EMAC_RX_CTL1 Контроллер Ethernet: список регистров 31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16 15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00 RX_DMA_START Bit 31R/W 0x0 When set, the RX DMA will not work. It is cleared internally and always read a 0. RX_DMA_EN Bit 30R/W 0x0 Receive DMA Enable Unused Bits 29 : 25RX_FIFO_FLOW_CTL Bit 24R/W 0x0 Receive FIFO Flow Control Enable RX_FLOW_CTL_TH_DEACT Bits 23 : 22R/W 0x0Thres 00: Full minus 1 KB RX_FLOW_CTL_TH_ACT Bits 21 : 20R/W 0x0 Threshold for Activating Flow Control Unused Bits 19 : 6RX_TH Bits 5 : 4R/W 0x0 Threshold for RX DMA FIFO Start RX_ERR_FRM Bit 3R/W 0x0 0: RX DMA drops frames with error RX_RUNT_FRM Bit 2R/W 0x0 When setting, forward undersized frames with no error and length less than RX_MD Bit 1R/W 0x0 Receive Mode FLUSH_RX_FRM Bit 0R/W 0x0 Flush Receive Frames Команда U-Boot для чтения регистра md 5020028 1md 5030028 1 Bit fields structuretypedef union emac_rx_ctl1 { struct { unsigned flush_rx_frm : 1; unsigned rx_md : 1; unsigned rx_runt_frm : 1; unsigned rx_err_frm : 1; unsigned rx_th : 2; unsigned unused0 : 14; unsigned rx_flow_ctl_th_act : 2; unsigned rx_flow_ctl_th_deact : 2; unsigned rx_fifo_flow_ctl : 1; unsigned unused1 : 5; unsigned rx_dma_en : 1; unsigned rx_dma_start : 1; } b; unsigned long w; } EMAC_RX_CTL1 |