Регистры H616: EMAC Management Interface Command Register

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

Unused

Bits 31 : 23

MDC_DIV_RATIO_M

Bits 22 : 20
R/W
0x0

MDC Clock Divide Ratio
000: 16
001: 32
010: 64
011: 128
Others: Reserved
Note: MDC Clock is divided from AHB clock.

Unused

Bits 19 : 17

PHY_ADDR

Bits 16 : 12
R/W
0x0

PHY Address

Unused

Bits 11 : 9

PHY_REG_ADDR

Bits 8 : 4
R/W
0x0

PHY Register Address

Unused

Bits 3 : 2

MII_WR

Bit 1
R/W
0x0

MII Write and Read
0: Read
1: Write

MII_BUSY

Bit 0
R/W
0x0

0: Write no valid, read 0 indicates finish in read or write operation
1: Write start read or write operation, read 1 indicates busy.

Bit fields structure

typedef union emac_mii_cmd { struct { unsigned mii_busy : 1; unsigned mii_wr : 1; unsigned unused0 : 2; unsigned phy_reg_addr : 5; unsigned unused1 : 3; unsigned phy_addr : 5; unsigned unused2 : 3; unsigned mdc_div_ratio_m : 3; unsigned unused3 : 9; } b; unsigned long w; } EMAC_MII_CMD