Регистры H616: IOMMU TLB PrefetchRegister

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

Unused

Bits 31 : 7

MICRO_TLB6_PREFETCH

Bit 6
R/W
0x0

Micro TLB6 prefetch enable
0: Disable
1: Enable
Note: When G2D accesses DDR, the prefetch function is suggested to
disable.

MICRO_TLB5_PREFETCH

Bit 5
R/W
0x0

Micro TLB5 prefetch enable
0: Disable
1: Enable

MICRO_TLB4_PREFETCH

Bit 4
R/W
0x0

Micro TLB4 prefetch enable
0: Disable
1: Enable

MICRO_TLB3_PREFETCH

Bit 3
R/W
0x0

Micro TLB3 prefetch enable
0: Disable
1: Enable

MICRO_TLB2_PREFETCH

Bit 2
R/W
0x0

Micro TLB2 prefetch enable
0: Disable
1: Enable

MICRO_TLB1_PREFETCH

Bit 1
R/W
0x0

Micro TLB1 prefetch enable
0: Disable
1: Enable

MICRO_TLB0_PREFETCH

Bit 0
R/W
0x0

Micro TLB0 prefetch enable
0: Disable
1: Enable

Bit fields structure

typedef union iommu_tlb_prefetch_reg { struct { unsigned micro_tlb0_prefetch : 1; unsigned micro_tlb1_prefetch : 1; unsigned micro_tlb2_prefetch : 1; unsigned micro_tlb3_prefetch : 1; unsigned micro_tlb4_prefetch : 1; unsigned micro_tlb5_prefetch : 1; unsigned micro_tlb6_prefetch : 1; unsigned unused0 : 25; } b; unsigned long w; } IOMMU_TLB_PREFETCH_REG