Регистры H616: TV Encoder Clock Gating Register

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

CLOCK_GATE_DIS

Bit 31
R/W
0x0

0: Enable
1: Disable

Unused

Bits 30 : 29

BIST_EN

Bit 28
R/W
0x0

0: Normal mode
1: Bist mode

Unused

Bits 27 : 23

UPSAMPLE_FOR_YPB_PR

Bit 22
R/W
0x0

0: 1x
1: 2x

UPSAMPLE_FOR_CVBS

Bits 21 : 20
R/W
0x0

Out up sample
00: 27 MHz
01: 54 MHz
10: 108 MHz
11: 216 MHz

Unused

Bits 19 : 1

TVE_EN

Bit 0
R/W
0x0

0: Disable
1: Enable
Video Encoder enable, default disable, write 1 to take it out of the reset state

Bit fields structure

typedef union tve_000_reg { struct { unsigned tve_en : 1; unsigned unused0 : 19; unsigned upsample_for_cvbs : 2; unsigned upsample_for_ypb_pr : 1; unsigned unused1 : 5; unsigned bist_en : 1; unsigned unused2 : 2; unsigned clock_gate_dis : 1; } b; unsigned long w; } TVE_000_REG