Регистры Allwinner H616
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TVE_004_REG
7.2.5. TV Encoder Configuration Register - адрес: 0x6520004 0x6524004 (смещение: 0x0004)

ТВ-кодер: список регистров

  Unused

Bits 31 : 30

  BYPASS_TV

Bit 29
R/W
0x0

0: Disable
1: Enable

  DAC_SRC_SEL

Bits 28 : 27
R/W
0x0

00: TV Encoder
01: LCD controller, override all other TV encoder setting, the DAC clock can from LCD controller.
10: DAC test mode,DAC using DAC clock
11: DAC test mode, DAC using AHB clock

  DAC_CONTROL_LOGIC_CLOCK_SEL

Bit 26
R/W
0x0

0: Using 27 MHz clock or 74.25 MHz clock depend on CCU setting
1: Using 54 MHz clock or 148.5 MHz clock depend on CCU setting

  CORE_DATAPATH_LOGIC_CLOCK_SEL

Bit 25
R/W
0x0

0: Using 27 MHz clock or 74.25 MHz clock depend on CCU setting
1: Using 54 MHz clock or 148.5 MHz clock depend on CCU setting

  CORE_CONTROL_LOGIC_CLOCK_SEL

Bit 24
R/W
0x0

0: Using 27 MHz clock or 74.25 MHz clock depend on CCU setting
1: Using 54 MHz clock or 148.5 MHz clock depend on CCU setting

  Unused

Bits 23 : 21

  CB_CR_SEQ_FOR_422_MODE

Bit 20
R/W
0x0

0: Cb first
1: Cr first

  INPUT_CHROMA_DATA_SAMPLING_RATE_SEL

Bit 19
R/W
0x0

1: 4:2:2

  YUV_RGB_OUTPUT_EN

Bit 18
R/W
0x0

0: CVBS
1: Reserved

  YC_EN

Bit 17
R/W
0x0

S-port Video enable Selection.
0: Y/C is disable
1: Reserved
This bit selects whether the S-port(Y/C) video output is enabled or disabled.

  CVBS_EN

Bit 16
R/W
0x1

Composite video enables selection
0: Composite video is disabled, Only Y/C is enabled
1: Composite video is enabled., CVBS and Y/C are enabled

This bit selects whether the composite video output (CVBS) is enabled or disabled.

  Unused

Bits 15 : 10

  COLOR_BAR_TYPE

Bit 9
R/W
0x0

0: 75/7.5/75/7.5 (NTSC), 100/0/75/0(PAL)
1: 100/7.5/100/7.5(NTSC), 100/0/100/0(PAL)

  COLOR_BAR_MODE

Bit 8
R/W
0x0

Standard Color bar input selection
0: The Video Encoder input is coming from the Display Engineer
1: The Video Encoder input is coming from an internal standard color bar generator.
This bit selects whether the Video Encoder video data input is replaced by an internal standard color bar generator or not.

  Unused

Bits 7 : 5

  MODE_1080I_1250LINE_SEL

Bit 4
R/W
0x0

0: 1125 Line mode
1: 1250 Line mode

  TVMODE_SELECT

Bits 3 : 0
R/W
0x0

0000: NTSC
0001: PAL
0010: Reserved
0011: Reserved
01xx: Reserved
100x: Reserved
101x: Reserved
110x: Reserved
111x: Reserved
Note: Changing this register value will cause some relative register setting to

Команда U-Boot для чтения регистра

md 6520004 1
md 6524004 1

Bit fields structure 

typedef union  tve_004_reg
{
  struct
  {
   unsigned tvmode_select : 4;
   unsigned mode_1080i_1250line_sel : 1;
   unsigned unused0 : 3;
   unsigned color_bar_mode : 1;
   unsigned color_bar_type : 1;
   unsigned unused1 : 6;
   unsigned cvbs_en : 1;
   unsigned yc_en : 1;
   unsigned yuv_rgb_output_en : 1;
   unsigned input_chroma_data_sampling_rate_sel : 1;
   unsigned cb_cr_seq_for_422_mode : 1;
   unsigned unused2 : 3;
   unsigned core_control_logic_clock_sel : 1;
   unsigned core_datapath_logic_clock_sel : 1;
   unsigned dac_control_logic_clock_sel : 1;
   unsigned dac_src_sel : 2;
   unsigned bypass_tv : 1;
   unsigned unused3 : 2;
  } b;
   unsigned long w;
} TVE_004_REG
Allwinner H616 Manual