Регистры H616: TV Encoder Burst Width Register

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

BACK_PORCH

Bits 31 : 24
R/W
0x0

Breezeway like in HD mode VSync 720p mode, is 220 2080i/p mode is 88(default)

Unused

Bit 23

BREEZEWAY

Bits 22 : 16
R/W
0x16

Must be even.
Specify the width of the breezeway in encoder clock cycles.
5 bit unsigned integer.
Allowed range is 0 to 31.
In 1080i mode, is 44
In 1080p mode, is 44
In 720p mode,is 40

Unused

Bit 15

BURST_WIDTH

Bits 14 : 8
R/W
0x44

Specify the width of the color frequency burst in encoder clock cycles.
7 bit unsigned integer. Allowed range is 0 to 127.
In hd mode, ignored

HSYNC_WIDTH

Bits 7 : 0
R/W
0x7e

Specify the width of the horizontal sync pulse in encoder clock cycles.

Min value is 16. Max value is (FrontPorch + ActiveLine - BackPorch).
Default value is 126.
The sum of HSyncSize and BackPorch is restricted to be divisible by 4.
In 720p mode, is 40
In 1080i/p mode, is 44

Bit fields structure

typedef union tve_114_reg { struct { unsigned hsync_width : 8; unsigned burst_width : 7; unsigned unused0 : 1; unsigned breezeway : 7; unsigned unused1 : 1; unsigned back_porch : 8; } b; unsigned long w; } TVE_114_REG