Unused Bits 31 : 13
FRXN Bit 12
R/W1C
0x0
Write 1 to flush RX FIFO, self clear to '0'.
Unused Bit 11
RXNTL Bits 10 : 4
R/W
0x40
RX FIFO Empty Trigger Level
Interrupt and DMA request trigger level for RXFIFO normal condition
Trigger Level = RXnTL
Unused Bits 3 : 2
RXNOM Bits 1 : 0
R/W
0x0
RX FIFO Output Mode(Mode 0, 1,2,3)
00: Expanding '0' at LSB of RX FIFO register
01: Expanding received sample sign bit at MSB of RX FIFO register.
10: Truncating received samples at high half-word of RX FIFO register and low half-word of RX FIFO register is filled by '0'.
11: Truncating received samples at low half-word of RX FIFO register and high half-word of RX FIFO register is expanded by its sign bit. Example for 20-bit received audio sample:
Mode 0: APB_RDATA[31:0] = {FIFO_O[31:12], 12'h0}.
Mode 1: APB_RDATA[31:0] = {12{FIFO_O[31]}, FIFO_O[31:12]}.
Mode 2: APB_RDATA[31:0] = {FIFO_O[31:16], 16'h0}.
Mode 3: APB_RDATA[31:0] = {16{FIFO_O[31]}, FIFO_O[31:16]}.
Команда U-Boot для чтения регистра md 110509a002 1
Bit fields structure
typedef union apbif_rxnfifo_ctrl
{
struct
{
unsigned rxnom : 2;
unsigned unused0 : 2;
unsigned rxntl : 7;
unsigned unused1 : 1;
unsigned frxn : 1;
unsigned unused2 : 19;
} b;
unsigned long w;
} APBIF_RXnFIFO_CTRL
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