Регистры Allwinner H616

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I2Sn_FMT0
8.1.6. I2Sn Format 0 - адрес: 0x20450a7003 (смещение: 0x0204+n*0x0100(n=0~3))

Аудио-концентратор: список регистров



31 ||||||||||||||||| 16
15 ||||||||||||||||| 00

  Unused

Bit 31

  LRCK_WIDTH

Bit 30
R/W
0x0

(Only apply in PCM mode) LRCK width
0: LRCK = 1 BCLK width (short frame)
1: LRCK = 2 BCLK width (long frame)


  Unused

Bits 29 : 20

  LRCK_POLARITY

Bit 19
R/W
0x0

When apply in I2S/Left-Justified/Right-Justified mode:
0: Left channel when LRCK is low
1: Left channel when LRCK is high
When apply in PCM mode:
0: PCM LRCK asserted at the negative edge
1: PCM LRCK asserted at the positive edge


  Unused

Bit 18

  LRCK_PERIOD

Bits 17 : 8
R/W
0x0

It is used to program the number of BCLKs per channel of sample
frame. This value is interpreted as follow:
PCM Mode: Number of BCLKs within (Left + Right) channel width.
I2S/Left-Justified/Right-Justified Mode: Number of BCLKs within each
individual channel width(Left or Right)
For example:
N = 7 : 8 BCLKs width
***
N = 1023 : 1024 BCLKs width


  BCLK_POLARITY

Bit 7
R/W
0x0

0: Normal mode, negative edge drive and positive edge sample
1: Invert mode, positive edge drive and negative edge sample


  SR_

Bits 6 : 4
R/W
0x3

Sample Resolution
000: Reserved
001: 8-bit
010: 12-bit
011: 16-bit
100: 20-bit
101: 24-bit
110: 28-bit
111: 32-bit


  EDGE_TRANSFER

Bit 3
R/W
0x0

0: SDO drive data and SDI sample data at the different BCLK edge
1: SDO drive data and SDI sample data at the sample BCLK edge
BCLK_PLARITY = 0, use negative edge
BCLK_PLARITY = 1, use positive edge


  SW_

Bits 2 : 0
R/W
0x3

Slot Width Select
000: Reserved
001: 8-bit
010: 12-bit
011: 16-bit
100: 20-bit
101: 24-bit
110: 28-bit
111: 32-bit



Команда U-Boot для чтения регистра

md 20450a7003 1



Bit fields structure

typedef union  i2sn_fmt0
{
  struct
  {
   unsigned sw_ : 3;
   unsigned edge_transfer : 1;
   unsigned sr_ : 3;
   unsigned bclk_polarity : 1;
   unsigned lrck_period : 10;
   unsigned unused0 : 1;
   unsigned lrck_polarity : 1;
   unsigned unused1 : 10;
   unsigned lrck_width : 1;
   unsigned unused2 : 1;
  } b;
   unsigned long w;
} I2Sn_FMT0
   

Allwinner H616 Manual