Регистры Allwinner H616

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I2Sn_CHCFG
8.1.6. I2Sn Channel Configuration - адрес: 0x22450a7003 (смещение: 0x0224+n*0x0100(n=0~3))

Аудио-концентратор: список регистров



31 ||||||||||||||||| 16
15 ||||||||||||||||| 00

  Unused

Bits 31 : 10

  TX_SLOT_HIZ

Bit 9
R/W
0x0

0:Normal Mode for the Last Half Cycle of BCLK in the Slot
1:Turn to Hi-Z State for the Last Half Cycle of BCLK in the Slot


  TX_STATE

Bit 8
R/W
0x0

0: Transfer Level 0 When Not Transferring Slot
1:Turn to Hi-Z State(TDM) When Not Transferring Slot


  RX_CHAN_NUM

Bits 7 : 4
R/W
0x0

RX Channel/Slot Number which between AHUB and I2Sn

0000: 1 channel or slot
***
0111: 8 channels or slots
1000: 9 channels or slots
***
1111: 16 channels or slots


  TX_CHAN_NUM

Bits 3 : 0
R/W
0x0

TX Channel/Slot Number which between AHUB and I2Sn

0000: 1 channel or slot
***
0111: 8 channels or slots
1000: 9 channels or slots
***
1111: 16 channels or slots



Команда U-Boot для чтения регистра

md 22450a7003 1



Bit fields structure

typedef union  i2sn_chcfg
{
  struct
  {
   unsigned tx_chan_num : 4;
   unsigned rx_chan_num : 4;
   unsigned tx_state : 1;
   unsigned tx_slot_hiz : 1;
   unsigned unused0 : 22;
  } b;
   unsigned long w;
} I2Sn_CHCFG
   

Allwinner H616 Manual