Регистры H616: DMIC Control Register

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

Unused

Bits 31 : 11

DMICFDT

Bits 10 : 9
R/W
0x0

DMIC RXFIFO Delay Time for Writing Data after GLOBE_EN
00: 5ms
01: 10ms
10: 20ms
11: 30ms

DMICDFEN

Bit 8
R/W
0x0

DMIC RXFIFO Delay Function for Writing Data after GLOBE_EN
0: Disable
1: Enable

DATA3_SWAP_ENA

Bit 7
R/W
0x0

DATA3 Left Data and Right Data Swap Enable
0: Disable
1: Enable

DATA2_SWAP_ENA

Bit 6
R/W
0x0

DATA2 Left Data and Right Data Swap Enable
0: Disable
1: Enable

DATA1_SWAP_ENA

Bit 5
R/W
0x0

DATA1 Left Data and Right Data Swap Enable
0: Disable
1: Enable

DATA0_SWAP_ENA

Bit 4
R/W
0x0

DATA0 Left Data and Right Data Swap Enable
0: Disable
1: Enable

Unused

Bits 3 : 1

DMIC_OVERSAMPLE_RATE

Bit 0
R/W
0x0

0: 128 (Support 8 kHz ~ 24 kHz)
1: 64 (Support 16 kHz ~ 48 kHz)

Bit fields structure

typedef union dmic_ctr { struct { unsigned dmic_oversample_rate : 1; unsigned unused0 : 3; unsigned data0_swap_ena : 1; unsigned data1_swap_ena : 1; unsigned data2_swap_ena : 1; unsigned data3_swap_ena : 1; unsigned dmicdfen : 1; unsigned dmicfdt : 2; unsigned unused1 : 21; } b; unsigned long w; } DMIC_CTR