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AC_DAC_FIFOC
8.4.5. DAC FIFO Control Register - адрес: 0x5096010 (смещение: 0x0010)

Аудиокодек: список регистров

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

  DAC_FS

Bits 31 : 29
R/W
0x0

Sample Rate of DAC
000: 48 kHz
010: 24 kHz
100: 12 kHz
110: 192 kHz
001: 32 kHz
011: 16 kHz
101: 8 kHz
111: 96 kHz
44.1 kHz/22.05 kHz/11.025 kHz can be supported by Audio PLL Configure Bit

  FIR_VER

Bit 28
R/W
0x0

FIR Version
0: 64-Tap FIR
1: 32-Tap FIR

  Unused

Bit 27

  SEND_LASAT

Bit 26
R/W
0x0

Audio sample select when TX FIFO underrun
0: Sending zero
1: Sending last audio sample

  FIFO_MODE

Bits 25 : 24
R/W
0x0

For 20-bit transmitted audio sample:
00/10: FIFO_I[19:0] = {TXDATA[31:12]}
01/11: FIFO_I[19:0] = {TXDATA[19:0]}
For 16-bit transmitted audio sample:
00/10: FIFO_I[19:0] = {TXDATA[31:16], 4'b0}
01/11: FIFO_I[19:0] = {TXDATA[15:0], 4'b0}

  Unused

Bit 23

  DAC_DRQ_CLR_CNT

Bits 22 : 21
R/W
0x0

When TX FIFO available room is less than or equal N, DRQ Request will be
de-asserted. N is defined here:
00: IRQ/DRQ De-asserted when WLEVEL > TXTL
01: 4
10: 8
11: 16

  Unused

Bits 20 : 15

  TX_TRIG_LEVEL

Bits 14 : 8
R/W
0x40

TX FIFO Empty Trigger Level (TXTL[12:0])
Interrupt and DMA request trigger level for TX FIFO normal condition.
IRQ/DRQ generated when WLEVEL ? TXTL
Note: WLEVEL represents the number of valid samples in the TX FIFO.
Only TXTL[6:0] valid when TXMODE = 0

  Unused

Bit 7

  DAC_MONO_EN

Bit 6
R/W
0x0

DAC Mono Enable
0: Stereo, 64 levels FIFO
1: mono, 128 levels FIFO
When enabled, L & R channel send same data.

  TX_SAMPLE_BITS

Bit 5
R/W
0x0

Transmitting Audio Sample Resolution
0: 16 bits
1: 24 bits

  DAC_DRQ_EN

Bit 4
R/W
0x0

DAC FIFO Empty DRQ Enable
0: Disable
1: Enable

  DAC_IRQ_EN

Bit 3
R/W
0x0

DAC FIFO Empty IRQ Enable
0: Disable
1: Enable

  FIFO_UNDERRUN_IRQ_EN

Bit 2
R/W
0x0

DAC FIFO Underrun IRQ Enable
0: Disable
1: Enable

  FIFO_OVERRUN_IRQ_EN

Bit 1
R/W
0x0

DAC FIFO Overrun IRQ Enable
0: Disable
1: Enable

  FIFO_FLUSH

Bit 0
R/WC
0x0

DAC FIFO Flush
Write 1 to flush TX FIFO, self clear to '0'

Команда U-Boot для чтения регистра

md 5096010 1

Bit fields structure 

typedef union  ac_dac_fifoc
{
  struct
  {
   unsigned fifo_flush : 1;
   unsigned fifo_overrun_irq_en : 1;
   unsigned fifo_underrun_irq_en : 1;
   unsigned dac_irq_en : 1;
   unsigned dac_drq_en : 1;
   unsigned tx_sample_bits : 1;
   unsigned dac_mono_en : 1;
   unsigned unused0 : 1;
   unsigned tx_trig_level : 7;
   unsigned unused1 : 6;
   unsigned dac_drq_clr_cnt : 2;
   unsigned unused2 : 1;
   unsigned fifo_mode : 2;
   unsigned send_lasat : 1;
   unsigned unused3 : 1;
   unsigned fir_ver : 1;
   unsigned dac_fs : 3;
  } b;
   unsigned long w;
} AC_DAC_FIFOC
Allwinner H616 Manual