Регистры Allwinner H616

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TWI_LCR
9.1.5. TWI Line Control Register - адрес: 0x5002020 0x5002420 0x5002820 0x5002c20 0x5003020 0x7081420 (смещение: 0x0020)

Двухпроводной интерфейс: список регистров



31 ||||||||||||||||| 16
15 ||||||||||||||||| 00

  Unused

Bits 31 : 6

  SCL_STATE

Bit 5
R
0x1

Current State of TWI_SCL
0: Low
1: High


  SDA_STATE

Bit 4
R
0x1

Current State of TWI_SDAж
0 : Low
1 : High


  SCL_CTL

Bit 3
R/W
0x1

TWI_SCL Line State Control Bit
When line control mode is enabled (bit[2] set), this bit decides the output
level of TWI_SCL.
0: Output low level
1: Output high level


  SCL_CTL_EN

Bit 2
R/W
0x0

TWI_SCL Line State Control Enable
When this bit is set, the state of TWI_SCL is controlled by the value of bit[3].
0: Disable TWI_SCL line control mode
1: Enable TWI_SCL line control mode


  SDA_CTL

Bit 1
R/W
0x1

TWI_SDA Line State Control Bit
When line control mode is enabled (bit[0] set), this bit decides the output
level of TWI_SDA.
0: Output low level
1: Output high level


  SDA_CTL_EN

Bit 0
R/W
0x0

TWI_SDA Line State Control Enable
When this bit is set, the state of TWI_SDA is controlled by the value of bit[1].
0: Disable TWI_SDA line control mode
1: Enable TWI_SDA line control mode



Команда U-Boot для чтения регистра

md 5002020 1
md 5002420 1
md 5002820 1
md 5002c20 1
md 5003020 1
md 7081420 1



Bit fields structure

typedef union  twi_lcr
{
  struct
  {
   unsigned sda_ctl_en : 1;
   unsigned sda_ctl : 1;
   unsigned scl_ctl_en : 1;
   unsigned scl_ctl : 1;
   unsigned sda_state : 1;
   unsigned scl_state : 1;
   unsigned unused0 : 26;
  } b;
   unsigned long w;
} TWI_LCR
   

Allwinner H616 Manual