Unused Bits 31 : 8
RBR Bits 7 : 0
R
0x0
Receiver Buffer Register
Data byte received on the serial input port (sin) in UART mode, or the serial
infrared input (sir_in) in infrared mode. The data in this register is valid only
if the Data Ready (DR) bit in the Line Status Register (LCR) is set.
If in FIFO mode and FIFOs are enabled (FCR[0] set to one), this register accesses the head of the receive FIFO.
If the receive FIFO is full and this register can not read before the next data character arrives,
then the data already in the FIFO is preserved, but any incoming data are lost and an overrun error occurs.
Команда U-Boot для чтения регистра md 5000000 1 md 5000400 1 md 5000800 1 md 5000c00 1 md 5001000 1 md 5001400 1
Bit fields structure
typedef union uart_rbr
{
struct
{
unsigned rbr : 8;
unsigned unused0 : 24;
} b;
unsigned long w;
} UART_RBR
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