Регистры Allwinner H616

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UART_THR
9.2.5. UART Transmit Holding Register - адрес: 0x5000000 0x5000400 0x5000800 0x5000c00 0x5001000 0x5001400 (смещение: 0x0000)

Универсальный асинхронный приемо-передатчик: список регистров



31 ||||||||||||||||| 16
15 ||||||||||||||||| 00

  Unused

Bits 31 : 8

  THR

Bits 7 : 0
W
0x0

Transmit Holding Register
Data be transmitted on the serial output port (sout) in UART mode or the
serial infrared output (sir_out_n) in infrared mode. Data should only be
written to the THR when the THR Empty (THRE) bit (LSR[5]) is set.
If in FIFO mode and FIFOs are enabled (FCR[0] = 1) and THRE is set, 16
number of characters data may be written to the THR before the FIFO is full.
When the FIFO is full, any write data results in the write data being lost.



Команда U-Boot для чтения регистра

md 5000000 1
md 5000400 1
md 5000800 1
md 5000c00 1
md 5001000 1
md 5001400 1



Bit fields structure

typedef union  uart_thr
{
  struct
  {
   unsigned thr : 8;
   unsigned unused0 : 24;
  } b;
   unsigned long w;
} UART_THR
   

Allwinner H616 Manual