Универсальный асинхронный приемо-передатчик: список регистров

  Unused

  DLAB

Divisor Latch Access Bit
It is writeable only when UART is not busy (USR[0] is zero) and always readable.
This bit is used to enable reading and writing of the Divisor Latch register (DLL and DLH) to set the baud rate of the UART.
This bit must be cleared after initial baud rate setup in order to access other registers.
0: Select RX Buffer Register (RBR) / TX Holding Register(THR) and Interrupt
Enable Register (IER)
1: Select Divisor Latch LS Register (DLL) and Divisor Latch MS Register (DLM)

  BCB

Break Control Bit
This is used to cause a break condition to be transmitted to the receiving
device. If setting to 0, the serial output is forced to the spacing (logic 0)
state. When not in Loopback mode, as determined by MCR[4], the sout line
is forced low until the Break bit is cleared. If SIR_MODE is enabled and
active (MCR[6] set to one) the sir_out_n line is continuously pulsed. When
in Loopback mode, the break condition is internally looped back to the
receiver and the sir_out_n line is forced low.

  EPS

Even Parity Select
It is writeable only when UART is not busy (USR[0] is zero) and always writable/readable.
This is used to select between even and odd parity, when parity is enabled (PEN set to one). Setting the LCR[5] is unset to reverse theLCR[4].
00: Odd Parity
01: Even Parity
1X: Reverse LCR[4]
In RS485 mode, it is the 9th bit--address bit.
11:9th bit = 0, indicates that this is a data byte.
10:9th bit = 1, indicates that this is an address byte.
Note: When using this function, PEN(LCR[3]) must set to 1.

  PEN

Parity Enable
It is writeable only when UART is not busy (USR[0] is zero) and always readable.
This bit is used to enable and disable parity generation and detection in transmitted and received serial character respectively.
0: Parity disabled
1: Parity enabled

  STOP

Number of stop bits
It is writeable only when UART is not busy (USR[0] is zero) and always readable.
This is used to select the number of stop bits per character that the peripheral transmits and receives.
If setting to 0, one stop bit is transmitted in the serial data.
If setting to 1 and the data bits are set to 5 (LCR[1:0] set to zero) one and a half stop bits is transmitted.
Otherwise, two stop bits are transmitted.
Note that regardless of the number of stop bits selected, the receiver checks only the first stop bit.
0: 1 stop bit
1: 1.5 stop bits when DLS (LCR[1:0]) is zero, else 2 stop bit

  DLS

Data Length Select
It is writeable only when UART is not busy (USR[0] is zero) and always readable.
This is used to select the number of data bits per character that the peripheral transmits and receives.
The number of bit that may be selected areas follows:
00: 5 bits
01: 6 bits
10: 7 bits
11: 8 bits

Команда U-Boot для чтения регистра

Bit fields structure

typedef union  uart_lcr
{
  struct
  {
   unsigned dls : 2;
   unsigned stop : 1;
   unsigned pen : 1;
   unsigned eps : 2;
   unsigned bcb : 1;
   unsigned dlab : 1;
   unsigned unused0 : 24;
  } b;
   unsigned long w;
} UART_LCR