Регистры Allwinner H616

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O_HcCommandStatus
9.5.3. OHCI Command Status Register - адрес: 0x5200408 0x5310408 0x5311408 (смещение: 0x0408)

Хост-контроллер USB2.0: список регистров



31 ||||||||||||||||| 16
15 ||||||||||||||||| 00

  RESERV

Bits 31 : 18
R/W
0x0

Reserved


  SCHEDULING_OVERRUN_COUNT

Bits 17 : 16
R (R/W )
0x0

These bits are incremented on each scheduling overrun error.
It is initialized to 00b and wraps around at 11b.
This will be incremented when a scheduling overrun is detected even if SchedulingOverrun in HcInterruptStatus has already been set.
This is used by HCD to monitor any persistent scheduling problem.


  Unused

Bits 15 : 4

  OWERSHIP_CHANGE_REQUEST

Bit 3
R/W (R/W
0x0

This bit is set by an OS HCD to request a change of control of the HC.
When set HC will set the OwnershipChange field in HcInterruptStatus.
After the changeover, this bit is cleared and remains so until the next request from OS HCD.


  BULK_LIST_FILLED

Bit 2
R/W (R/W
0x0

This bit is used to indicate whether there are any TDs on the Bulk list.
It is set by HCD whenever it adds a TD to an ED in the Bulk list.
When HC begins to process the head of the Bulk list, it checks BLF.
As long as BulkListFilled is 0, HC will not start processing the Bulk list.
If BulkListFilled is 1, HC will start processing the Bulk list and will set BF to 0.
If HC finds a TD on the list, then HC will set BulkListFilled to 1 causing the Bulk list processing to continue.
If no TD is found on the Bulk list, and if HCD does not set BulkListFilled,
then BulkListFilled will still be 0 when HC completes processing the Bulk list and Bulk list processing will stop.


  CONTROL_LIST_FILLED

Bit 1
R/W (R/
0x0

This bit is used to indicate whether there are any TDs on the Control list.
It is set by HCD whenever it adds a TD to an ED in the Control list.
When HC begins to process the head of the Control list, it checks CLF.
As long as ControlListFilled is 0, HC will not start processing the Control list.
If CF is 1, HC will start processing the Control list and will set ControlListFilled to 0.
If HC finds a TD on the list, then HC will set ControlListFilled to 1 causing the Control list processing to continue.
If no TD is found on the Control list, and if the HCD does not set ControlListFilled, then
ControlListFilled will still be 0 when HC completes processing the Control list and Control list processing will stop.


  HOST_CONTROLLER_RESET

Bit 0
R/W (R/E
0x0

This bit is by HCD to initiate a software reset of HC.
Regardless of the functional state of HC, it moves to the USBSuspend state in which most of the operational registers are reset except those stated otherwise;
e.g, the InteruptRouting field of HcControl, and no Host bus accesses are allowed.
This bit is cleared by HC upon the completion of the reset operation.
The reset operation must be completed within 10 ms.
This bit, when set, should not cause a reset to the Root Hub and no subsequent reset signaling should be asserted to its downstream ports.

Note: For field Read/Write :
1) HCD
2) HC



Команда U-Boot для чтения регистра

md 5200408 1
md 5310408 1
md 5311408 1



Bit fields structure

typedef union  o_hccommandstatus
{
  struct
  {
   unsigned host_controller_reset : 1;
   unsigned control_list_filled : 1;
   unsigned bulk_list_filled : 1;
   unsigned owership_change_request : 1;
   unsigned unused0 : 12;
   unsigned scheduling_overrun_count : 2;
   unsigned reserv : 14;
  } b;
   unsigned long w;
} O_HcCommandStatus
   

Allwinner H616 Manual