Регистры H616: CIR Control Register

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

Unused

Bits 31 : 8

ACTIVE_PULSE_ACCEPT_MODE

Bits 7 : 6
R/W
0x0

00, 01: Both positive and negative pulses are valid as a leading code
10: Only negative pulse is valid as a leading code
11: Only positive pulse is valid as a leading code

CIR_ENABLE

Bits 5 : 4
R/W
0x0

00~10: Reserved
11: CIR mode enable

Unused

Bits 3 : 2

RXEN

Bit 1
R/W
0x0

Receiver Block Enable
0: Disable
1: Enable

GEN

Bit 0
R/W
0x0

Global Enable
A disable on this bit overrides any other block or channel enables and flushes all FIFOs.
0: Disable
1: Enable

Bit fields structure

typedef union cir_ctl { struct { unsigned gen : 1; unsigned rxen : 1; unsigned unused0 : 2; unsigned cir_enable : 2; unsigned active_pulse_accept_mode : 2; unsigned unused1 : 24; } b; unsigned long w; } CIR_CTL