31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00
Unused
Bits
31 :
25
SCS2
Bit
24R/W
0x0
Bit2 of Sample Clock Select for CIR
This bit is defined by SCS bits below.
ATHC
Bit
23R/W
0x0
Active Threshold Control for CIR
0: ATHR in unit of (Sample Clock)
1: ATHR in unit of (128*Sample Clocks)
ATHR
Bits
22 :
16R/W
0x0
Active Threshold for CIR
These bits control the duration of CIR from idle to active state.
The duration can be calculated by ((ATHR + 1)*(ATHC? Sample Clock: 128*Sample Clock)).
ITHR
Bits
15 :
8R/W
0x18
Idle Threshold for CIR
The Receiver uses it to decide whether the CIR command has been received.
If there is no CIR signal on the air, the receiver is staying in IDLE status.
One active pulse will bring the receiver from IDLE status to Receiving status.
After the CIR is end, the inputting signal will keep the specified level (high or low level) for a long time.
The receiver can use this idle signal duration to decide that it has received the CIR command.
The corresponding flag is asserted.
If the corresponding interrupt is enabled, the interrupt line is asserted to CPU.
When the duration of signal keeps one status (high or low level) for the specified duration
( (ITHR + 1)*128 sample_clk ), this means that the previous CIR command has been finished.
NTHR
Bits
7 :
2R/W
0xA
Noise Threshold for CIR
When the duration of signal pulse (high or low level) is less than NTHR, the pulse is taken as noise and should be discarded by hardware.
0: All samples are recorded into RX FIFO
1: If the signal is only one sample duration, it is taken as noise and discarded.
2: If the signal is less than (<=) two sample duration, it is taken as noise and discarded.
***
61: If the signal is less than (<=) sixty-one sample duration, it is taken as noise and discarded.
SCS
Bits
1 :
0R/W
0x0
Sample Clock Select for CIR
SCS2 SCS[1] SCS[0] Sample Clock
0 0 0 CIR_CLK/64
0 0 1 CIR_CLK/128
0 1 0 CIR_CLK /256
0 1 1 CIR_CLK /512
1 0 0 CIR_CLK
1 0 1 Reserved
1 1 0 Reserved
1 1 1 Reserved