Регистры H616: PWM45 Clock Configuration Register

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

Unused

Bits 31 : 9

PWM45_CLK_SRC_SEL

Bits 8 : 7
R/W
0x0

Select PWM45 clock source
00: OSC24M
01: APB1
Others: Reserved

Unused

Bit 6

PWM45_CLK_SRC_BYPASS_TO_PWM4

Bit 5
R/W
0x0

Bypass PWM45 clock source to PWM4 output
0: not bypass
1: bypass

PWM45_CLK_GATING

Bit 4
R/W
0x0

Gating clock for PWM45
0: Mask
1: Pass

PWM45_CLK_DIV_M

Bits 3 : 0
R/W
0x0

PWM45 clock divide M
0000: /1
0001: /2
0010: /4
0011: /8
0100: /16
0101: /32
0110: /64
0111: /128
1000: /256
others: /

Bit fields structure

typedef union pccr45 { struct { unsigned pwm45_clk_div_m : 4; unsigned pwm45_clk_gating : 1; unsigned pwm45_clk_src_bypass_to_pwm4 : 1; unsigned unused0 : 1; unsigned pwm45_clk_src_sel : 2; unsigned unused1 : 23; } b; unsigned long w; } PCCR45