When creating one event and the event is available on both atom
and core, two events are created automatically. One is for atom,
the other is for core. Most of hardware events and cache events
are available on both cpu_core and cpu_atom.
For hardware events, they have pre-defined configs (e.g. 0 for
cycles). But on hybrid platform, kernel needs to know where the
event comes from (from atom or from core). The original perf
event type PERF_TYPE_HARDWARE can't carry pmu information. So now
this type is extended to be PMU aware type. The PMU type ID is
stored at attr.config[63:32].
PMU type ID is retrieved from sysfs. /sys/devices/cpu_atom/type
/sys/devices/cpu_core/type
The new attr.config layout for PERF_TYPE_HARDWARE:
PERF_TYPE_HARDWARE: 0xEEEEEEEE000000AA AA: hardware event ID
EEEEEEEE: PMU type ID
Cache event is similar. The type PERF_TYPE_HW_CACHE is extended
to be PMU aware type. The PMU type ID is stored at
attr.config[63:32].
The new attr.config layout for PERF_TYPE_HW_CACHE:
PERF_TYPE_HW_CACHE: 0xEEEEEEEE00DDCCBB BB: hardware cache ID CC:
hardware cache op ID DD: hardware cache op result ID EEEEEEEE:
PMU type ID
When enabling a hardware event without specified pmu, such as,
perf stat -e cycles -a (use system-wide in this example), two
events are created automatically.
------------------------------------------------------------
perf_event_attr:
size 120
config 0x400000000
sample_type IDENTIFIER
read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING
disabled 1
inherit 1
exclude_guest 1
------------------------------------------------------------
and
------------------------------------------------------------
perf_event_attr:
size 120
config 0x800000000
sample_type IDENTIFIER
read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING
disabled 1
inherit 1
exclude_guest 1
------------------------------------------------------------
type 0 is PERF_TYPE_HARDWARE. 0x4 in 0x400000000 indicates it's
cpu_core pmu. 0x8 in 0x800000000 indicates it's cpu_atom pmu
(atom pmu type id is random).
The kernel creates cycles (0x400000000) on cpu0-cpu15 (core
cpus), and create cycles (0x800000000) on cpu16-cpu23 (atom
cpus).
For perf-stat result, it displays two events:
Performance counter stats for 'system wide':
6,744,979 cpu_core/cycles/
1,965,552 cpu_atom/cycles/
The first cycles is core event, the second cycles is atom event.
