компилятор C и C ++ проекта GNU (GNU project C and C++ compiler)
Параметры подробно (Options detail)
RISC-V
These command-line options are defined for RISC-V targets:
-mbranch-cost=
n
Set the cost of branches to roughly n instructions.
-mplt
-mno-plt
When generating PIC code, do or don't allow the use of PLTs.
Ignored for non-PIC. The default is -mplt
.
-mabi=
ABI-string
Specify integer and floating-point calling convention. ABI-
string contains two parts: the size of integer types and the
registers used for floating-point types. For example
-march=rv64ifd -mabi=lp64d
means that long
and pointers are
64-bit (implicitly defining int
to be 32-bit), and that
floating-point values up to 64 bits wide are passed in F
registers. Contrast this with -march=rv64ifd -mabi=lp64f
,
which still allows the compiler to generate code that uses
the F and D extensions but only allows floating-point values
up to 32 bits long to be passed in registers; or
-march=rv64ifd -mabi=lp64
, in which no floating-point
arguments will be passed in registers.
The default for this argument is system dependent, users who
want a specific calling convention should specify one
explicitly. The valid calling conventions are: ilp32
,
ilp32f
, ilp32d
, lp64
, lp64f
, and lp64d
. Some calling
conventions are impossible to implement on some ISAs: for
example, -march=rv32if -mabi=ilp32d
is invalid because the
ABI requires 64-bit values be passed in F registers, but F
registers are only 32 bits wide. There is also the ilp32e
ABI that can only be used with the rv32e
architecture. This
ABI is not well specified at present, and is subject to
change.
-mfdiv
-mno-fdiv
Do or don't use hardware floating-point divide and square
root instructions. This requires the F or D extensions for
floating-point registers. The default is to use them if the
specified architecture has these instructions.
-mdiv
-mno-div
Do or don't use hardware instructions for integer division.
This requires the M extension. The default is to use them if
the specified architecture has these instructions.
-march=
ISA-string
Generate code for given RISC-V ISA (e.g. rv64im
). ISA
strings must be lower-case. Examples include rv64i
, rv32g
,
rv32e
, and rv32imaf
.
-mtune=
processor-string
Optimize the output for the given processor, specified by
microarchitecture name. Permissible values for this option
are: rocket
, sifive-3-series
, sifive-5-series
,
sifive-7-series
, and size
.
When -mtune=
is not specified, the default is rocket
.
The size
choice is not intended for use by end-users. This
is used when -Os
is specified. It overrides the instruction
cost info provided by -mtune=
, but does not override the
pipeline info. This helps reduce code size while still
giving good performance.
-mpreferred-stack-boundary=
num
Attempt to keep the stack boundary aligned to a 2 raised to
num byte boundary. If -mpreferred-stack-boundary
is not
specified, the default is 4 (16 bytes or 128-bits).
Warning:
If you use this switch, then you must build all
modules with the same value, including any libraries. This
includes the system libraries and startup modules.
-msmall-data-limit=
n
Put global and static data smaller than n bytes into a
special section (on some targets).
-msave-restore
-mno-save-restore
Do or don't use smaller but slower prologue and epilogue code
that uses library function calls. The default is to use fast
inline prologues and epilogues.
-mstrict-align
-mno-strict-align
Do not or do generate unaligned memory accesses. The default
is set depending on whether the processor we are optimizing
for supports fast unaligned access or not.
-mcmodel=medlow
Generate code for the medium-low code model. The program and
its statically defined symbols must lie within a single 2 GiB
address range and must lie between absolute addresses -2 GiB
and +2 GiB. Programs can be statically or dynamically linked.
This is the default code model.
-mcmodel=medany
Generate code for the medium-any code model. The program and
its statically defined symbols must be within any single 2
GiB address range. Programs can be statically or dynamically
linked.
-mexplicit-relocs
-mno-exlicit-relocs
Use or do not use assembler relocation operators when dealing
with symbolic addresses. The alternative is to use assembler
macros instead, which may limit optimization.
-mrelax
-mno-relax
Take advantage of linker relaxations to reduce the number of
instructions required to materialize symbol addresses. The
default is to take advantage of linker relaxations.
-memit-attribute
-mno-emit-attribute
Emit (do not emit) RISC-V attribute to record extra
information into ELF objects. This feature requires at least
binutils 2.32.