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   make.1p    ( 1 )

поддерживать, обновлять и восстанавливать группы программ (РАЗРАБОТКА) (maintain, update, and regenerate groups of programs (DEVELOPMENT))

Расширенное описание (Extended description)

The make utility attempts to perform the actions required to ensure that the specified targets are up-to-date. A target shall be considered up-to-date if it exists and is newer than all of its dependencies, or if it has already been made up-to-date by the current invocation of make (regardless of the target's existence or age). A target may also be considered up-to-date if it exists, is the same age as one or more of its prerequisites, and is newer than the remaining prerequisites (if any). The make utility shall treat all prerequisites as targets themselves and recursively ensure that they are up-to-date, processing them in the order in which they appear in the rule. The make utility shall use the modification times of files to determine whether the corresponding targets are out-of-date.

To ensure that a target is up-to-date, make shall ensure that all of the prerequisites of a target are up-to-date, then check to see if the target itself is up-to-date. If the target is not up- to-date, the target shall be made up-to-date by executing the rule's commands (if any). If the target does not exist after the target has been successfully made up-to-date, the target shall be treated as being newer than any target for which it is a prerequisite.

If a target exists and there is neither a target rule nor an inference rule for the target, the target shall be considered up- to-date. It shall be an error if make attempts to ensure that a target is up-to-date but the target does not exist and there is neither a target rule nor an inference rule for the target.

Makefile Syntax A makefile can contain rules, macro definitions (see Macros), include lines, and comments. There are two kinds of rules: inference rules and target rules. The make utility shall contain a set of built-in inference rules. If the -r option is present, the built-in rules shall not be used and the suffix list shall be cleared. Additional rules of both types can be specified in a makefile. If a rule is defined more than once, the value of the rule shall be that of the last one specified. Macros can also be defined more than once, and the value of the macro is specified in Macros. There are three kinds of comments: blank lines, empty lines, and a <number-sign> ('#') and all following characters up to the first unescaped <newline> character. Blank lines, empty lines, and lines with <number-sign> ('#') as the first character on the line are also known as comment lines.

By default, the following files shall be tried in sequence: ./makefile and ./Makefile. If neither ./makefile or ./Makefile are found, other implementation-defined files may also be tried. On XSI-conformant systems, the additional files ./s.makefile, SCCS/s.makefile, ./s.Makefile, and SCCS/s.Makefile shall also be tried.

The -f option shall direct make to ignore any of these default files and use the specified argument as a makefile instead. If the '-' argument is specified, standard input shall be used.

The term makefile is used to refer to any rules provided by the user, whether in ./makefile or its variants, or specified by the -f option.

The rules in makefiles shall consist of the following types of lines: target rules, including special targets (see Target Rules), inference rules (see Inference Rules), macro definitions (see Macros), and comments.

Target and Inference Rules may contain command lines. Command lines can have a prefix that shall be removed before execution (see Makefile Execution).

When an escaped <newline> (one preceded by a <backslash>) is found anywhere in the makefile except in a command line, an include line, or a line immediately preceding an include line, it shall be replaced, along with any leading white space on the following line, with a single <space>. When an escaped <newline> is found in a command line in a makefile, the command line shall contain the <backslash>, the <newline>, and the next line, except that the first character of the next line shall not be included if it is a <tab>. When an escaped <newline> is found in an include line or in a line immediately preceding an include line, the behavior is unspecified.

Include Lines If the word include appears at the beginning of a line and is followed by one or more <blank> characters, the string formed by the remainder of the line shall be processed as follows to produce a pathname:

* The trailing <newline>, any <blank> characters immediately preceding a comment, and any comment shall be discarded. If the resulting string contains any double-quote characters ('"') the behavior is unspecified.

* The resulting string shall be processed for macro expansion (see Macros).

* Any <blank> characters that appear after the first non-<blank> shall be used as separators to divide the macro- expanded string into fields. It is unspecified whether any other white-space characters are also used as separators. It is unspecified whether pathname expansion (see Section 2.13, Pattern Matching Notation) is also performed.

* If the processing of separators and optional pathname expansion results in either zero or two or more non-empty fields, the behavior is unspecified. If it results in one non-empty field, that field is taken as the pathname.

If the pathname does not begin with a '/' it shall be treated as relative to the current working directory of the process, not relative to the directory containing the makefile. If the file does not exist in this location, it is unspecified whether additional directories are searched.

The contents of the file specified by the pathname shall be read and processed as if they appeared in the makefile in place of the include line. If the file ends with an escaped <newline> the behavior is unspecified.

The file may itself contain further include lines. Implementations shall support nesting of include files up to a depth of at least 16.

Makefile Execution Makefile command lines shall be processed one at a time.

Makefile command lines can have one or more of the following prefixes: a <hyphen-minus> ('-'), an at-sign ('@'), or a <plus- sign> ('+'). These shall modify the way in which make processes the command.

- If the command prefix contains a <hyphen-minus>, or the -i option is present, or the special target .IGNORE has either the current target as a prerequisite or has no prerequisites, any error found while executing the command shall be ignored.

@ If the command prefix contains an at-sign and the make utility command line -n option is not specified, or the -s option is present, or the special target .SILENT has either the current target as a prerequisite or has no prerequisites, the command shall not be written to standard output before it is executed.

+ If the command prefix contains a <plus-sign>, this indicates a makefile command line that shall be executed even if -n, -q, or -t is specified.

An execution line is built from the command line by removing any prefix characters. Except as described under the at-sign prefix, the execution line shall be written to the standard output, optionally preceded by a <tab>. The execution line shall then be executed by a shell as if it were passed as the argument to the system() interface, except that if errors are not being ignored then the shell -e option shall also be in effect. If errors are being ignored for the command (as a result of the -i option, a '-' command prefix, or a .IGNORE special target), the shell -e option shall not be in effect. The environment for the command being executed shall contain all of the variables in the environment of make.

By default, when make receives a non-zero status from the execution of a command, it shall terminate with an error message to standard error.

Target Rules Target rules are formatted as follows:

target [target...]: [prerequisite...][;command] [<tab>command <tab>command ...]

line that does not begin with <tab>

Target entries are specified by a <blank>-separated, non-null list of targets, then a <colon>, then a <blank>-separated, possibly empty list of prerequisites. Text following a <semicolon>, if any, and all following lines that begin with a <tab>, are makefile command lines to be executed to update the target. The first non-empty line that does not begin with a <tab> or '#' shall begin a new entry. Any comment line may begin a new entry.

Applications shall select target names from the set of characters consisting solely of periods, underscores, digits, and alphabetics from the portable character set (see the Base Definitions volume of POSIX.1‐2017, Section 6.1, Portable Character Set). Implementations may allow other characters in target names as extensions. The interpretation of targets containing the characters '%' and '"' is implementation-defined.

A target that has prerequisites, but does not have any commands, can be used to add to the prerequisite list for that target. Only one target rule for any given target can contain commands.

Lines that begin with one of the following are called special targets and control the operation of make:

.DEFAULT If the makefile uses this special target, the application shall ensure that it is specified with commands, but without prerequisites. The commands shall be used by make if there are no other rules available to build a target.

.IGNORE Prerequisites of this special target are targets themselves; this shall cause errors from commands associated with them to be ignored in the same manner as specified by the -i option. Subsequent occurrences of .IGNORE shall add to the list of targets ignoring command errors. If no prerequisites are specified, make shall behave as if the -i option had been specified and errors from all commands associated with all targets shall be ignored.

.POSIX The application shall ensure that this special target is specified without prerequisites or commands. If it appears as the first non-comment line in the makefile, make shall process the makefile as specified by this section; otherwise, the behavior of make is unspecified.

.PRECIOUS Prerequisites of this special target shall not be removed if make receives one of the asynchronous events explicitly described in the ASYNCHRONOUS EVENTS section. Subsequent occurrences of .PRECIOUS shall add to the list of precious files. If no prerequisites are specified, all targets in the makefile shall be treated as if specified with .PRECIOUS.

.SCCS_GET The application shall ensure that this special target is specified without prerequisites. If this special target is included in a makefile, the commands specified with this target shall replace the default commands associated with this special target (see Default Rules). The commands specified with this target are used to get all SCCS files that are not found in the current directory.

When source files are named in a dependency list, make shall treat them just like any other target. Because the source file is presumed to be present in the directory, there is no need to add an entry for it to the makefile. When a target has no dependencies, but is present in the directory, make shall assume that that file is up-to-date. If, however, an SCCS file named SCCS/s.source_file is found for a target source_file, make compares the timestamp of the target file with that of the SCCS/s.source_file to ensure the target is up-to-date. If the target is missing, or if the SCCS file is newer, make shall automatically issue the commands specified for the .SCCS_GET special target to retrieve the most recent version. However, if the target is writable by anyone, make shall not retrieve a new version.

.SILENT Prerequisites of this special target are targets themselves; this shall cause commands associated with them not to be written to the standard output before they are executed. Subsequent occurrences of .SILENT shall add to the list of targets with silent commands. If no prerequisites are specified, make shall behave as if the -s option had been specified and no commands or touch messages associated with any target shall be written to standard output.

.SUFFIXES Prerequisites of .SUFFIXES shall be appended to the list of known suffixes and are used in conjunction with the inference rules (see Inference Rules). If .SUFFIXES does not have any prerequisites, the list of known suffixes shall be cleared.

The special targets .IGNORE, .POSIX, .PRECIOUS, .SILENT, and .SUFFIXES shall be specified without commands.

Targets with names consisting of a leading <period> followed by the uppercase letters "POSIX" and then any other characters are reserved for future standardization. Targets with names consisting of a leading <period> followed by one or more uppercase letters are reserved for implementation extensions.

Macros Macro definitions are in the form:

string1 = [string2]

The macro named string1 is defined as having the value of string2, where string2 is defined as all characters, if any, after the <equals-sign>, up to a comment character ('#') or an unescaped <newline>. Any <blank> characters immediately before or after the <equals-sign> shall be ignored.

Applications shall select macro names from the set of characters consisting solely of periods, underscores, digits, and alphabetics from the portable character set (see the Base Definitions volume of POSIX.1‐2017, Section 6.1, Portable Character Set). A macro name shall not contain an <equals-sign>. Implementations may allow other characters in macro names as extensions.

Macros can appear anywhere in the makefile. Macro expansions using the forms $(string1) or ${string1} shall be replaced by string2, as follows:

* Macros in target lines shall be evaluated when the target line is read.

* Macros in makefile command lines shall be evaluated when the command is executed.

* Macros in the string before the <equals-sign> in a macro definition shall be evaluated when the macro assignment is made.

* Macros after the <equals-sign> in a macro definition shall not be evaluated until the defined macro is used in a rule or command, or before the <equals-sign> in a macro definition.

The parentheses or braces are optional if string1 is a single character. The macro $$ shall be replaced by the single character '$'. If string1 in a macro expansion contains a macro expansion, the results are unspecified.

Macro expansions using the forms $(string1[:subst1=[subst2]]) or ${string1[:subst1=[subst2]]} can be used to replace all occurrences of subst1 with subst2 when the macro substitution is performed. The subst1 to be replaced shall be recognized when it is a suffix at the end of a word in string1 (where a word, in this context, is defined to be a string delimited by the beginning of the line, a <blank>, or a <newline>). If string1 in a macro expansion contains a macro expansion, the results are unspecified. If a <percent-sign> character appears as part of subst1 or subst2 after any macros have been recursively expanded, the results are unspecified.

Macro expansions in string1 of macro definition lines shall be evaluated when read. Macro expansions in string2 of macro definition lines shall be performed when the macro identified by string1 is expanded in a rule or command.

Macro definitions shall be taken from the following sources, in the following logical order, before the makefile(s) are read.

1. Macros specified on the make utility command line, in the order specified on the command line. It is unspecified whether the internal macros defined in Internal Macros are accepted from this source.

2. Macros defined by the MAKEFLAGS environment variable, in the order specified in the environment variable. It is unspecified whether the internal macros defined in Internal Macros are accepted from this source.

3. The contents of the environment, excluding the MAKEFLAGS and SHELL variables and including the variables with null values.

4. Macros defined in the inference rules built into make.

Macro definitions from these sources shall not override macro definitions from a lower-numbered source. Macro definitions from a single source (for example, the make utility command line, the MAKEFLAGS environment variable, or the other environment variables) shall override previous macro definitions from the same source.

Macros defined in the makefile(s) shall override macro definitions that occur before them in the makefile(s) and macro definitions from source 4. If the -e option is not specified, macros defined in the makefile(s) shall override macro definitions from source 3. Macros defined in the makefile(s) shall not override macro definitions from source 1 or source 2.

Before the makefile(s) are read, all of the make utility command line options (except -f and -p) and make utility command line macro definitions (except any for the MAKEFLAGS macro), not already included in the MAKEFLAGS macro, shall be added to the MAKEFLAGS macro, quoted in an implementation-defined manner such that when MAKEFLAGS is read by another instance of the make command, the original macro's value is recovered. Other implementation-defined options and macros may also be added to the MAKEFLAGS macro. If this modifies the value of the MAKEFLAGS macro, or, if the MAKEFLAGS macro is modified at any subsequent time, the MAKEFLAGS environment variable shall be modified to match the new value of the MAKEFLAGS macro. The result of setting MAKEFLAGS in the Makefile is unspecified.

Before the makefile(s) are read, all of the make utility command line macro definitions (except the MAKEFLAGS macro or the SHELL macro) shall be added to the environment of make. Other implementation-defined variables may also be added to the environment of make. Macros defined by the MAKEFLAGS environment variable and macros defined in the makefile(s) shall not be added to the environment of make if they are not already in its environment. With the exception of SHELL (see below), it is unspecified whether macros defined in these ways update the value of an environment variable that already exists in the environment of make.

The SHELL macro shall be treated specially. It shall be provided by make and set to the pathname of the shell command language interpreter (see sh(1p)). The SHELL environment variable shall not affect the value of the SHELL macro. If SHELL is defined in the makefile or is specified on the command line, it shall replace the original value of the SHELL macro, but shall not affect the SHELL environment variable. Other effects of defining SHELL in the makefile or on the command line are implementation- defined.

Inference Rules Inference rules are formatted as follows:

target: <tab>command [<tab>command] ...

line that does not begin with <tab> or #

The application shall ensure that the target portion is a valid target name (see Target Rules) of the form .s2 or .s1.s2 (where .s1 and .s2 are suffixes that have been given as prerequisites of the .SUFFIXES special target and s1 and s2 do not contain any <slash> or <period> characters.) If there is only one <period> in the target, it is a single-suffix inference rule. Targets with two periods are double-suffix inference rules. Inference rules can have only one target before the <colon>.

The application shall ensure that the makefile does not specify prerequisites for inference rules; no characters other than white space shall follow the <colon> in the first line, except when creating the empty rule, described below. Prerequisites are inferred, as described below.

Inference rules can be redefined. A target that matches an existing inference rule shall overwrite the old inference rule. An empty rule can be created with a command consisting of simply a <semicolon> (that is, the rule still exists and is found during inference rule search, but since it is empty, execution has no effect). The empty rule can also be formatted as follows:

rule: ;

where zero or more <blank> characters separate the <colon> and <semicolon>.

The make utility uses the suffixes of targets and their prerequisites to infer how a target can be made up-to-date. A list of inference rules defines the commands to be executed. By default, make contains a built-in set of inference rules. Additional rules can be specified in the makefile.

The special target .SUFFIXES contains as its prerequisites a list of suffixes that shall be used by the inference rules. The order in which the suffixes are specified defines the order in which the inference rules for the suffixes are used. New suffixes shall be appended to the current list by specifying a .SUFFIXES special target in the makefile. A .SUFFIXES target with no prerequisites shall clear the list of suffixes. An empty .SUFFIXES target followed by a new .SUFFIXES list is required to change the order of the suffixes.

Normally, the user would provide an inference rule for each suffix. The inference rule to update a target with a suffix .s1 from a prerequisite with a suffix .s2 is specified as a target .s2.s1. The internal macros provide the means to specify general inference rules (see Internal Macros).

When no target rule is found to update a target, the inference rules shall be checked. The suffix of the target (.s1) to be built is compared to the list of suffixes specified by the .SUFFIXES special targets. If the .s1 suffix is found in .SUFFIXES, the inference rules shall be searched in the order defined for the first .s2.s1 rule whose prerequisite file ($*.s2) exists. If the target is out-of-date with respect to this prerequisite, the commands for that inference rule shall be executed.

If the target to be built does not contain a suffix and there is no rule for the target, the single suffix inference rules shall be checked. The single-suffix inference rules define how to build a target if a file is found with a name that matches the target name with one of the single suffixes appended. A rule with one suffix .s2 is the definition of how to build target from target.s2. The other suffix (.s1) is treated as null.

A <tilde> ('~') in the above rules refers to an SCCS file in the current directory. Thus, the rule .c~.o would transform an SCCS C-language source file into an object file (.o). Because the s. of the SCCS files is a prefix, it is incompatible with make's suffix point of view. Hence, the '~' is a way of changing any file reference into an SCCS file reference.

Libraries If a target or prerequisite contains parentheses, it shall be treated as a member of an archive library. For the lib(member.o) expression lib refers to the name of the archive library and member.o to the member name. The application shall ensure that the member is an object file with the .o suffix. The modification time of the expression is the modification time for the member as kept in the archive library; see ar(1p). The .a suffix shall refer to an archive library. The .s2.a rule shall be used to update a member in the library from a file with a suffix .s2.

Internal Macros The make utility shall maintain five internal macros that can be used in target and inference rules. In order to clearly define the meaning of these macros, some clarification of the terms target rule, inference rule, target, and prerequisite is necessary.

Target rules are specified by the user in a makefile for a particular target. Inference rules are user-specified or make- specified rules for a particular class of target name. Explicit prerequisites are those prerequisites specified in a makefile on target lines. Implicit prerequisites are those prerequisites that are generated when inference rules are used. Inference rules are applied to implicit prerequisites or to explicit prerequisites that do not have target rules defined for them in the makefile. Target rules are applied to targets specified in the makefile.

Before any target in the makefile is updated, each of its prerequisites (both explicit and implicit) shall be updated. This shall be accomplished by recursively processing each prerequisite. Upon recursion, each prerequisite shall become a target itself. Its prerequisites in turn shall be processed recursively until a target is found that has no prerequisites, or further recursion would require applying two inference rules one immediately after the other, at which point the recursion shall stop. As an extension, implementations may continue recursion when two or more successive inference rules need to be applied; however, if there are multiple different chains of such rules that could be used to create the target, it is unspecified which chain is used. The recursion shall then back up, updating each target as it goes.

In the definitions that follow, the word target refers to one of:

* A target specified in the makefile

* An explicit prerequisite specified in the makefile that becomes the target when make processes it during recursion

* An implicit prerequisite that becomes a target when make processes it during recursion

In the definitions that follow, the word prerequisite refers to one of the following:

* An explicit prerequisite specified in the makefile for a particular target

* An implicit prerequisite generated as a result of locating an appropriate inference rule and corresponding file that matches the suffix of the target

The five internal macros are:

$@ The $@ shall evaluate to the full target name of the current target, or the archive filename part of a library archive target. It shall be evaluated for both target and inference rules.

For example, in the .c.a inference rule, $@ represents the out-of-date .a file to be built. Similarly, in a makefile target rule to build lib.a from file.c, $@ represents the out-of-date lib.a.

$% The $% macro shall be evaluated only when the current target is an archive library member of the form libname(member.o). In these cases, $@ shall evaluate to libname and $% shall evaluate to member.o. The $% macro shall be evaluated for both target and inference rules.

For example, in a makefile target rule to build lib.a(file.o), $% represents file.o, as opposed to $@, which represents lib.a.

$? The $? macro shall evaluate to the list of prerequisites that are newer than the current target. It shall be evaluated for both target and inference rules.

For example, in a makefile target rule to build prog from file1.o, file2.o, and file3.o, and where prog is not out- of-date with respect to file1.o, but is out-of-date with respect to file2.o and file3.o, $? represents file2.o and file3.o.

$< In an inference rule, the $< macro shall evaluate to the filename whose existence allowed the inference rule to be chosen for the target. In the .DEFAULT rule, the $< macro shall evaluate to the current target name. The meaning of the $< macro shall be otherwise unspecified.

For example, in the .c.a inference rule, $< represents the prerequisite .c file.

$* The $* macro shall evaluate to the current target name with its suffix deleted. It shall be evaluated at least for inference rules.

For example, in the .c.a inference rule, $*.o represents the out-of-date .o file that corresponds to the prerequisite .c file.

Each of the internal macros has an alternative form. When an uppercase 'D' or 'F' is appended to any of the macros, the meaning shall be changed to the directory part for 'D' and filename part for 'F'. The directory part is the path prefix of the file without a trailing <slash>; for the current directory, the directory part is '.'. When the $? macro contains more than one prerequisite filename, the $(?D) and $(?F) (or ${?D} and ${?F}) macros expand to a list of directory name parts and filename parts respectively.

For the target lib(member.o) and the s2.a rule, the internal macros shall be defined as:

$< member.s2

$* member

$@ lib

$? member.s2

$% member.o

Default Rules The default rules for make shall achieve results that are the same as if the following were used. Implementations that do not support the C-Language Development Utilities option may omit CC, CFLAGS, YACC, YFLAGS, LEX, LFLAGS, LDFLAGS, and the .c, .y, and .l inference rules. Implementations that do not support FORTRAN may omit FC, FFLAGS, and the .f inference rules. Implementations may provide additional macros and rules.

SPECIAL TARGETS

.SCCS_GET: sccs $(SCCSFLAGS) get $(SCCSGETFLAGS) $@

.SUFFIXES: .o .c .y .l .a .sh .f .c~ .y~ .l~ .sh~ .f~

MACROS

MAKE=make AR=ar ARFLAGS=-rv YACC=yacc YFLAGS= LEX=lex LFLAGS= LDFLAGS= CC=c99 CFLAGS=-O 1 FC=fort77 FFLAGS=-O 1 GET=get GFLAGS= SCCSFLAGS= SCCSGETFLAGS=-s

SINGLE SUFFIX RULES

.c: $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $<

.f: $(FC) $(FFLAGS) $(LDFLAGS) -o $@ $<

.sh: cp $< $@ chmod a+x $@

.c~: $(GET) $(GFLAGS) -p $< > $*.c $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $*.c

.f~: $(GET) $(GFLAGS) -p $< > $*.f $(FC) $(FFLAGS) $(LDFLAGS) -o $@ $*.f

.sh~: $(GET) $(GFLAGS) -p $< > $*.sh cp $*.sh $@ chmod a+x $@

DOUBLE SUFFIX RULES

.c.o: $(CC) $(CFLAGS) -c $<

.f.o: $(FC) $(FFLAGS) -c $<

.y.o: $(YACC) $(YFLAGS) $< $(CC) $(CFLAGS) -c y.tab.c rm -f y.tab.c mv y.tab.o $@

.l.o: $(LEX) $(LFLAGS) $< $(CC) $(CFLAGS) -c lex.yy.c rm -f lex.yy.c mv lex.yy.o $@

.y.c: $(YACC) $(YFLAGS) $< mv y.tab.c $@

.l.c: $(LEX) $(LFLAGS) $< mv lex.yy.c $@

.c~.o: $(GET) $(GFLAGS) -p $< > $*.c $(CC) $(CFLAGS) -c $*.c

.f~.o: $(GET) $(GFLAGS) -p $< > $*.f $(FC) $(FFLAGS) -c $*.f

.y~.o: $(GET) $(GFLAGS) -p $< > $*.y $(YACC) $(YFLAGS) $*.y $(CC) $(CFLAGS) -c y.tab.c rm -f y.tab.c mv y.tab.o $@

.l~.o: $(GET) $(GFLAGS) -p $< > $*.l $(LEX) $(LFLAGS) $*.l $(CC) $(CFLAGS) -c lex.yy.c rm -f lex.yy.c mv lex.yy.o $@

.y~.c: $(GET) $(GFLAGS) -p $< > $*.y $(YACC) $(YFLAGS) $*.y mv y.tab.c $@

.l~.c: $(GET) $(GFLAGS) -p $< > $*.l $(LEX) $(LFLAGS) $*.l mv lex.yy.c $@

.c.a: $(CC) -c $(CFLAGS) $< $(AR) $(ARFLAGS) $@ $*.o rm -f $*.o

.f.a: $(FC) -c $(FFLAGS) $< $(AR) $(ARFLAGS) $@ $*.o rm -f $*.o