Регистры H616: SMHC2 Clock Register

SMHC2_CLK_REG

3.3.4. SMHC2 Clock Register - адрес: 0x3001838 (смещение: 0x0838)

Контроллер синхрогенератора: список регистров

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

SCLK_GATING

Bit 31
R/W
0x0

Gating Special Clock
0: Clock is OFF
1: Clock is ON
SCLK = Clock Source/M/N.

Unused

Bits 30 : 26

CLK_SRC_SEL

Bits 25 : 24
R/W
0x0

Clock Source Select
00: OSC24M
01: PLL_PERI0(2X)
10: PLL_PERI1(2X)
11: /

Unused

Bits 23 : 10

FACTOR_N

Bits 9 : 8
R/W
0x0

Factor N
00: 1
01: 2
10: 4
11: 8

Unused

Bits 7 : 4

FACTOR_M

Bits 3 : 0
R/W
0x0

Factor M (M = FACTOR_M +1)
FACTOR_M is from 0 to 15.

Bit fields structure

typedef union smhc2_clk_reg { struct { unsigned factor_m : 4; unsigned unused0 : 4; unsigned factor_n : 2; unsigned unused1 : 14; unsigned clk_src_sel : 2; unsigned unused2 : 5; unsigned sclk_gating : 1; } b; unsigned long w; } SMHC2_CLK_REG