Имя модуля: CCU , базовый адрес: 0x03001000

Руководство п. 3.3.4

Регистров: 124

Имя регистра | Смещение

1) PLL_CPUX_CTRL_REG | 0x0000
PLL_CPUX Control Register

2) PLL_DDR0_CTRL_REG | 0x0010
PLL_DDR0 Control Register

3) PLL_DDR1_CTRL_REG | 0x0018
PLL_DDR1 Control Register

4) PLL_PERI0_CTRL_REG | 0x0020
PLL_PERI0 Control Register

5) PLL_PERI1_CTRL_REG | 0x0028
PLL_PERI1 Control Register

6) PLL_GPU0_CTRL_REG | 0x0030
PLL_GPU0 Control Register

7) PLL_VIDEO0_CTRL_REG | 0x0040
PLL_VIDEO0 Control Register

8) PLL_VIDEO1_CTRL_REG | 0x0048
PLL_VIDEO1 Control Register

9) PLL_VE_CTRL_REG | 0x0058
PLL_VE Control Register

10) PLL_DE_CTRL_REG | 0x0060
PLL_DE Control Register

11) PLL_AUDIO_CTRL_REG | 0x0078
PLL_AUDIO Control Register

12) PLL_DDR0_PAT_CTRL_REG | 0x0110
PLL_DDR0 Pattern Control Register

13) PLL_DDR1_PAT_CTRL_REG | 0x0118
PLL_DDR1 Pattern Control Register

14) PLL_PERI0_PAT0_CTRL_REG | 0x0120
PLL_PERI0 Pattern0 Control Register

15) PLL_PERI0_PAT1_CTRL_REG | 0x0124
PLL_PERI0 Pattern1 Control Register

16) PLL_PERI1_PAT0_CTRL_REG | 0x0128
PLL_PERI1 Pattern0 Control Register

17) PLL_PERI1_PAT1_CTRL_REG | 0x012C
PLL_PERI1 Pattern1 Control Register

18) PLL_GPU0_PAT0_CTRL_REG | 0x0130
PLL_GPU0 Pattern0 Control Register

19) PLL_GPU0_PAT1_CTRL_REG | 0x0134
PLL_GPU0 Pattern1 Control Register

20) PLL_VIDEO0_PAT0_CTRL_REG | 0x0140
PLL_VIDEO0 Pattern0 Control Register

21) PLL_VIDEO0_PAT1_CTRL_REG | 0x0144
PLL_VIDEO0 Pattern1 Control Register

22) PLL_VIDEO1_PAT0_CTRL_REG | 0x0148
PLL_VIDEO1 Pattern0 Control Register

23) PLL_VIDEO1_PAT1_CTRL_REG | 0x014C
PLL_VIDEO1 Pattern1 Control Register

24) PLL_VE_PAT0_CTRL_REG | 0x0158
PLL_VE Pattern0 Control Register

25) PLL_VE_PAT1_CTRL_REG | 0x015C
PLL_VE Pattern1 Control Register

26) PLL_DE_PAT0_CTRL_REG | 0x0160
PLL_DE Pattern0 Control Register

27) PLL_DE_PAT1_CTRL_REG | 0x0164
PLL_DE Pattern1 Control Register

28) PLL_AUDIO_PAT0_CTRL_REG | 0x0178
PLL_AUDIO Pattern0 Control Register

29) PLL_AUDIO_PAT1_CTRL_REG | 0x017C
PLL_AUDIO Pattern1 Control Register

30) PLL_CPUX_BIAS_REG | 0x0300
PLL_CPUX Bias Register

31) PLL_DDR0_BIAS_REG | 0x0310
PLL_DDR0 Bias Register

32) PLL_DDR1_BIAS_REG | 0x0318
PLL_DDR1 Bias Register

33) PLL_PERI0_BIAS_REG | 0x0320
PLL_PERI0 Bias Register

34) PLL_PERI1_BIAS_REG | 0x0328
PLL_PERI1 Bias Register

35) PLL_GPU0_BIAS_REG | 0x0330
PLL_GPU0 Bias Register

36) PLL_VIDEO0_BIAS_REG | 0x0340
PLL_VIDEO0 Bias Register

37) PLL_VIDEO1_BIAS_REG | 0x0348
PLL_VIDEO1 Bias Register

38) PLL_VE_BIAS_REG | 0x0358
PLL_VE Bias Register

39) PLL_DE_BIAS_REG | 0x0360
PLL_DE Bias Register

40) PLL_AUDIO_BIAS_REG | 0x0378
PLL_AUDIO Bias Register

41) PLL_CPUX_TUN_REG | 0x0400
PLL_CPUX Tuning Register

42) CPUX_AXI_CFG_REG | 0x0500
CPUX_AXI Configuration Register

43) PSI_AHB1_AHB2_CFG_REG | 0x0510
PSI_AHB1_AHB2 Configuration Register

44) AHB3_CFG_REG | 0x051C
AHB3 Configuration Register

45) APB1_CFG_REG | 0x0520
APB1 Configuration Register

46) APB2_CFG_REG | 0x0524
APB2 Configuration Register

47) MBUS_CFG_REG | 0x0540
MBUS Configuration Register

48) DE_CLK_REG | 0x0600
DE Clock Register

49) DE_BGR_REG | 0x060C
DE Bus Gating Reset Register

50) DI_CLK_REG | 0x0620
DI Clock Register

51) DI_BGR_REG | 0x062C
DI Bus Gating Reset Register

52) G2D_CLK_REG | 0x0630
G2D Clock Register

53) G2D_BGR_REG | 0x063C
G2D Bus Gating Reset Register

54) GPU_CLK0_REG | 0x0670
GPU Clock0 Register

55) GPU_CLK1_REG | 0x0674
GPU Clock1 Register

56) GPU_BGR_REG | 0x067C
GPU Bus Gating Reset Register

57) CE_CLK_REG | 0x0680
CE Clock Register

58) CE_BGR_REG | 0x068C
CE Bus Gating Reset Register

59) VE_CLK_REG | 0x0690
VE Clock Register

60) VE_BGR_REG | 0x069C
VE Bus Gating Reset Register

61) DMA_BGR_REG | 0x070C
DMA Bus Gating Reset Register

62) HSTIMER_BGR_REG | 0x073C
HSTIMER Bus Gating Reset Register

63) AVS_CLK_REG | 0x0740
AVS Clock Register

64) DBGSYS_BGR_REG | 0x078C
DBGSYS Bus Gating Reset Register

65) PSI_BGR_REG | 0x079C
PSI Bus Gating Reset Register

66) PWM_BGR_REG | 0x07AC
PWM Bus Gating Reset Register

67) IOMMU_BGR_REG | 0x07BC
IOMMU Bus Gating Reset Register

68) DRAM_CLK_REG | 0x0800
DRAM Clock Register

69) MBUS_MAT_CLK_GATING_REG | 0x0804
MBUS Master Clock Gating Register

70) DRAM_BGR_REG | 0x080C
DRAM Bus Gating Reset Register

71) NAND0_0_CLK_REG | 0x0810
NAND0_0 Clock Register

72) NAND0_1_CLK_REG | 0x0814
NAND0_1 Clock Register

73) NAND_BGR_REG | 0x082C
NAND Bus Gating Reset Register

74) SMHC0_CLK_REG | 0x0830
SMHC0 Clock Register

75) SMHC1_CLK_REG | 0x0834
SMHC1 Clock Register

76) SMHC2_CLK_REG | 0x0838
SMHC2 Clock Register

77) SMHC_BGR_REG | 0x084C
SMHC Bus Gating Reset Register

78) UART_BGR_REG | 0x090C
UART Bus Gating Reset Register

79) TWI_BGR_REG | 0x091C
TWI Bus Gating Reset Register

80) SPI0_CLK_REG | 0x0940
SPI0 Clock Register

81) SPI1_CLK_REG | 0x0944
SPI1 Clock Register

82) SPI_BGR_REG | 0x096C
SPI Bus Gating Reset Register

83) EPHY_25M_CLK_REG | 0x0970
EPHY_25M Clock Register

84) EMAC_BGR_REG | 0x097C
EMAC Bus Gating Reset Register

85) TS_CLK_REG | 0x09B0
TS Clock Register

86) TS_BGR_REG | 0x09BC
TS Bus Gating Reset Register

87) THS_BGR_REG | 0x09FC
THS Bus Gating Reset Register

88) OWA_CLK_REG | 0x0A20
OWA Clock Register

89) OWA_BGR_REG | 0x0A2C
OWA Bus Gating Reset Register

90) DMIC_CLK_REG | 0x0A40
DMIC Clock Register

91) DMIC_BGR_REG | 0x0A4C
DMIC Bus Gating Reset Register

92) AUDIO_CODEC_1X_CLK_REG | 0x0A50
AUDIO CODEC 1X Clock Register

93) AUDIO_CODEC_4X_CLK_REG | 0x0A54
AUDIO CODEC 4X Clock Register

94) AUDIO_CODEC_BGR_REG | 0x0A5C
AUDIO CODEC Bus Gating Reset Register

95) AUDIO_HUB_CLK_REG | 0x0A60
AUDIO_HUB Clock Register

96) AUDIO_HUB_BGR_REG | 0x0A6C
AUDIO_HUB Bus Gating Reset Register

97) USB0_CLK_REG | 0x0A70
USB0 Clock Register

98) USB1_CLK_REG | 0x0A74
USB1 Clock Register

99) USB2_CLK_REG | 0x0A78
USB2 Clock Register

100) USB_BGR_REG | 0x0A8C
USB Bus Gating Reset Register

101) HDMI0_CLK_REG | 0x0B00
HDMI0 Clock Register

102) HDMI0_SLOW_CLK_REG | 0x0B04
HDMI0 Slow Clock Register

103) HDMI_CEC_CLK_REG | 0x0B10
HDMI CEC Clock Register

104) HDMI_BGR_REG | 0x0B1C
HDMI Bus Gating Reset Register

105) DISPLAY_IF_TOP_BGR_REG | 0x0B5C
DISPLAY_IF_TOP BUS GATING RESET Register

106) TCON_TV0_CLK_REG | 0x0B80
TCON TV0 Clock Register

107) TCON_TV1_CLK_REG | 0x0B80
TCON TV1 Clock Register

108) TCON_TV_BGR_REG | 0x0B9C
TCON TV GATING RESET Register

109) TVE0_CLK_REG | 0x0BB0
TVE0 Clock Register

110) TVE_BGR_REG | 0x0BBC
TVE BUS GATING RESET Register

111) HDMI_HDCP_CLK_REG | 0x0C40
HDMI HDCP Clock Register

112) HDMI_HDCP_BGR_REG | 0x0C4C
HDMI HDCP Bus Gating Reset Register

113) CCU_SEC_SWITCH_REG | 0x0F00
CCU Security Switch Register

114) PLL_LOCK_DBG_CTRL_REG | 0x0F04
PLL Lock Debug Control Register

115) FRE_DET_CTRL_REG | 0x0F08
Frequency Detect Control Register

116) FRE_UP_LIM_REG | 0x0F0C
Frequency Up Limit Register

117) FRE_DOWN_LIM_REG | 0x0F10
Frequency Down Limit Register

118) 24M_27M_CLK_OUTPUT_REG | 0x0F20
24M or 27M Clock Output Regist

119) PLL_VIDEO2_CTRL_REG | 0x0050
PLL_VIDEO2 Control Register

120) PLL_VIDEO2_PAT0_CTRL_REG | 0x0150
PLL_VIDEO2 Pattern0 Control Register

121) PLL_VIDEO2_PAT1_CTRL_REG | 0x0154
PLL_VIDEO2 Pattern1 Control Register

122) PLL_VIDEO2_BIAS_REG | 0x0350
PLL_VIDEO2 Bias Register

123) USB3_CLK_REG | 0x0A7C
Clock Register

124) LRADC_BGR_REG | 0x0A9C
LRADC Bus Gating Reset Register