Регистры H616: SPI1 Clock Register

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

SCLK_GATING

Bit 31
R/W
0x0

Gating Special Clock
0: Clock is OFF
1: Clock is ON
SCLK = Clock Source/M/N.

Unused

Bits 30 : 27

CLK_SRC_SEL

Bits 26 : 24
R/W
0x0

Clock Source Select
000: OSC24M
001: PLL_PERI0(1X)
010: PLL_PERI1(1X)
011: PLL_PERI0(2X)
100: PLL_PERI1(2X)
Others: /

Unused

Bits 23 : 10

FACTOR_N

Bits 9 : 8
R/W
0x0

Factor N
00: 1
01: 2
10: 4
11: 8

Unused

Bits 7 : 4

FACTOR_M

Bits 3 : 0
R/W
0x0

Factor M.(M= FACTOR_M +1)
FACTOR_M is from 0 to 15.

Bit fields structure

typedef union spi1_clk_reg { struct { unsigned factor_m : 4; unsigned unused0 : 4; unsigned factor_n : 2; unsigned unused1 : 14; unsigned clk_src_sel : 3; unsigned unused2 : 4; unsigned sclk_gating : 1; } b; unsigned long w; } SPI1_CLK_REG