Регистры H616: USB1 Clock Register

USB1_CLK_REG

3.3.4. USB1 Clock Register - адрес: 0x3001a74 (смещение: 0x0A74)

Контроллер синхрогенератора: список регистров

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

SCLK_GATING_OHCI1

Bit 31
R/W
0x0

Gating Special Clock For OHCI1
0: Clock is OFF
1: Clock is ON

USBPHY1_RST

Bit 30
R/W
0x0

USB PHY1 Reset
0: Assert
1: De-assert

SCLK_GATING_USBPHY1

Bit 29
R/W
0x0

Gating Special Clock For USBPHY1
0: Clock is OFF
1: Clock is ON
SCLK is from OSC24M.

Unused

Bits 28 : 26

OHCI1_12M_SRC_SEL

Bits 25 : 24
R/W
0x0

OHCI1 12M Source Select
00: 12M divided from 48 MHz
01: 12M divided from 24 MHz
10: LOSC
11: /

Unused

Bits 23 : 0

Bit fields structure

typedef union usb1_clk_reg { struct { unsigned unused0 : 24; unsigned ohci1_12m_src_sel : 2; unsigned unused1 : 3; unsigned sclk_gating_usbphy1 : 1; unsigned usbphy1_rst : 1; unsigned sclk_gating_ohci1 : 1; } b; unsigned long w; } USB1_CLK_REG