Регистры Allwinner H616

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USB3_CLK_REG
3.3.4. Clock Register - адрес: 0x3001a7c (смещение: 0x0A7C)

Контроллер синхрогенератора: список регистров



31 ||||||||||||||||| 16
15 ||||||||||||||||| 00

  SCLK_GATING_OHCI3

Bit 31
R/W
0x0

Gating Special Clock For OHCI3
0: Clock is OFF
1: Clock is ON


  USBPHY3_RST

Bit 30
R/W
0x0

USB PHY3 Reset
0: Assert
1: De-assert


  SCLK_GATING_USBPHY3

Bit 29
R/W
0x0

Gating Special Clock For USBPHY3
0: Clock is OFF
1: Clock is ON
SCLK is from OSC24M.


  Unused

Bits 28 : 26

  OHCI3_12M_SRC_SEL

Bits 25 : 24
R/W
0x0

OHCI3 12M Source Select
00: 12M divided from 48 MHz
01: 12M divided from 24 MHz
10: LOSC
11: /


  Unused

Bits 23 : 0


Команда U-Boot для чтения регистра

md 3001a7c 1



Bit fields structure

typedef union  usb3_clk_reg
{
  struct
  {
   unsigned unused0 : 24;
   unsigned ohci3_12m_src_sel : 2;
   unsigned unused1 : 3;
   unsigned sclk_gating_usbphy3 : 1;
   unsigned usbphy3_rst : 1;
   unsigned sclk_gating_ohci3 : 1;
  } b;
   unsigned long w;
} USB3_CLK_REG
   

Allwinner H616 Manual