USB3_CLK_REG Контроллер синхрогенератора: список регистров 31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16 15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00 SCLK_GATING_OHCI3 Bit 31R/W 0x0 Gating Special Clock For OHCI3 USBPHY3_RST Bit 30R/W 0x0 USB PHY3 Reset SCLK_GATING_USBPHY3 Bit 29R/W 0x0 Gating Special Clock For USBPHY3 Unused Bits 28 : 26OHCI3_12M_SRC_SEL Bits 25 : 24R/W 0x0 OHCI3 12M Source Select Unused Bits 23 : 0Команда U-Boot для чтения регистра md 3001a7c 1Bit fields structuretypedef union usb3_clk_reg { struct { unsigned unused0 : 24; unsigned ohci3_12m_src_sel : 2; unsigned unused1 : 3; unsigned sclk_gating_usbphy3 : 1; unsigned usbphy3_rst : 1; unsigned sclk_gating_ohci3 : 1; } b; unsigned long w; } USB3_CLK_REG |