Регистры H616: TWI Bus Gating Reset Register

31 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 16
15 |•|•|•|•|•|•|•|•|•|•|•|•|•|•|•|•| 00

Unused

Bits 31 : 21

TWI4_RST

Bit 20
R/W
0x0

TWI4 Reset
0: Assert
1: De-assert

TWI3_RST

Bit 19
R/W
0x0

TWI3 Reset
0: Assert
1: De-assert

TWI2_RST

Bit 18
R/W
0x0

TWI2 Reset
0: Assert
1: De-assert

TWI1_RST

Bit 17
R/W
0x0

TWI1 Reset
0: Assert
1: De-assert

TWI0_RST

Bit 16
R/W
0x0

TWI0 Reset
0: Assert
1: De-assert

Unused

Bits 15 : 5

TWI4_GATING

Bit 4
R/W
0x0

Gating Clock for TWI4
0: Mask
1: Pass

TWI3_GATING

Bit 3
R/W
0x0

Gating Clock for TWI3
0: Mask
1: Pass

TWI2_GATING

Bit 2
R/W
0x0

Gating Clock for TWI2
0: Mask
1: Pass

TWI1_GATING

Bit 1
R/W
0x0

Gating Clock for TWI1
0: Mask
1: Pass

TWI0_GATING

Bit 0
R/W
0x0

Gating Clock for TWI0
0: Mask
1: Pass

Note
The working clock of TWI is APB2.

Bit fields structure

typedef union twi_bgr_reg { struct { unsigned twi0_gating : 1; unsigned twi1_gating : 1; unsigned twi2_gating : 1; unsigned twi3_gating : 1; unsigned twi4_gating : 1; unsigned unused0 : 11; unsigned twi0_rst : 1; unsigned twi1_rst : 1; unsigned twi2_rst : 1; unsigned twi3_rst : 1; unsigned twi4_rst : 1; unsigned unused1 : 11; } b; unsigned long w; } TWI_BGR_REG