поддержка Intel Sandy Bridge core PMU (support for Intel Sandy Bridge core PMU)
Имя (Name)
libpfm_intel_snb - support for Intel Sandy Bridge core PMU
Синопсис (Synopsis)
#include <perfmon/pfmlib.h>
PMU name: snb
PMU desc: Intel Sandy Bridge
PMU name: snb_ep
PMU desc: Intel Sandy Bridge EP
Описание (Description)
The library supports the Intel Sandy Bridge core PMU. It should
be noted that this PMU model only covers each core's PMU and not
the socket level PMU. For that refer to the Sandy Bridge uncore
PMU support.
On Sandy Bridge, the number of generic counters depends on the
Hyperthreading (HT) mode. When HT is on, then only 4 generic
counters are available. When HT is off, then 8 generic counters
are available. The pfm_get_pmu_info() function returns the
maximum number of generic counters in num_cntrs.
Модификаторы (Modifiers)
The following modifiers are supported on Intel Sandy Bridge
processors:
u Measure at user level which includes privilege levels 1,
2, 3. This corresponds to PFM_PLM3. This is a boolean
modifier.
k Measure at kernel level which includes privilege level 0.
This corresponds to PFM_PLM0. This is a boolean modifier.
i Invert the meaning of the event. The counter will now
count cycles in which the event is not occurring. This is
a boolean modifier
e Enable edge detection, i.e., count only when there is a
state transition from no occurrence of the event to at
least one occurrence. This modifier must be combined with
a counter mask modifier (m) with a value greater or equal
to one. This is a boolean modifier.
c Set the counter mask value. The mask acts as a threshold.
The counter will count the number of cycles in which the
number of occurrences of the event is greater or equal to
the threshold. This is an integer modifier with values in
the range [0:255].
t Measure on both threads at the same time assuming hyper-
threading is enabled. This is a boolean modifier.
ldlat Pass a latency threshold to the
MEM_TRANS_RETIRED:LATENCY_ABOVE_THRESHOLD event. This is
an integer attribute that must be in the range [3:65535].
It is required for this event. Note that the event must
be used with precise sampling (PEBS).
Cобытия отклика вне ядра (Offcore_response events)
Intel Sandy Bridge provides two offcore_response events, like
Intel Westmere. They are called OFFCORE_RESPONSE_0 and
OFFCORE_RESPONSE_1.
Those events need special treatment in the performance monitoring
infrastructure because each event uses an extra register to store
some settings. Thus, in case multiple offcore_response events are
monitored simultaneously, the kernel needs to manage the sharing
of that extra register.
The offcore_response events are exposed as a normal events by the
library. The extra settings are exposed as regular umasks. The
library takes care of encoding the events according to the
underlying kernel interface.
On Intel Sandy Bridge, the umasks are divided into three
categories: request, supplier and snoop. The user must provide at
least one umask for each category. The categories are shown in
the umask descriptions.
There is also the special response umask called ANY_RESPONSE.
When this umask is used then it overrides any supplier and snoop
umasks. In other words, users can specify either ANY_RESPONSE OR
any combinations of supplier + snoops.
In case no supplier or snoop is specified, the library defaults
to using ANY_RESPONSE.
For instance, the following are valid event selections:
OFFCORE_RESPONSE_0:DMND_DATA_RD:ANY_RESPONSE
OFFCORE_RESPONSE_0:ANY_REQUEST
OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:SNOOP_ANY
But the following are illegal:
OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:ANY_RESPONSE
OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:SNOOP_ANY:ANY_RESPONSE
Смотри также (See also)
libpfm_snb_unc(3)
