Регистры H616: Прямой доступ к памяти

Регистров: 18

Имя регистра | Смещение

typedef union dma_irq_en_reg0 { struct { unsigned dma0_hlaf_irq_en : 1; unsigned dma0_pkg_irq_en : 1; unsigned dma0_queue_irq_en : 1; unsigned unused0 : 1; unsigned dma1_hlaf_irq_en : 1; unsigned dma1_pkg_irq_en : 1; unsigned dma1_queue_irq_en : 1; unsigned unused1 : 1; unsigned dma2_hlaf_irq_en : 1; unsigned dma2_pkg_irq_en : 1; unsigned dma2_queue_irq_en : 1; unsigned unused2 : 1; unsigned dma3_hlaf_irq_en : 1; unsigned dma3_pkg_irq_en : 1; unsigned dma3_queue_irq_en : 1; unsigned unused3 : 1; unsigned dma4_hlaf_irq_en : 1; unsigned dma4_pkg_irq_en : 1; unsigned dma4_queue_irq_en : 1; unsigned unused4 : 1; unsigned dma5_hlaf_irq_en : 1; unsigned dma5_pkg_irq_en : 1; unsigned dma5_queue_irq_en : 1; unsigned unused5 : 1; unsigned dma6_hlaf_irq_en : 1; unsigned dma6_pkg_irq_en : 1; unsigned dma6_queue_irq_en : 1; unsigned unused6 : 1; unsigned dma7_hlaf_irq_en : 1; unsigned dma7_pkg_irq_en : 1; unsigned dma7_queue_irq_en : 1; unsigned unused7 : 1; } b; unsigned long w; } DMA_IRQ_EN_REG0

2) DMA_IRQ_EN_REG1 | 0x0004

typedef union dma_irq_en_reg1 { struct { unsigned dma8_hlaf_irq_en : 1; unsigned dma8_pkg_irq_en : 1; unsigned dma8_queue_irq_en : 1; unsigned unused0 : 1; unsigned dma9_hlaf_irq_en : 1; unsigned dma9_pkg_irq_en : 1; unsigned dma9_queue_irq_en : 1; unsigned unused1 : 1; unsigned dma10_hlaf_irq_en : 1; unsigned dma10_pkg_irq_en : 1; unsigned dma10_queue_irq_en : 1; unsigned unused2 : 1; unsigned dma11_hlaf_irq_en : 1; unsigned dma11_pkg_irq_en : 1; unsigned dma11_queue_irq_en : 1; unsigned unused3 : 1; unsigned dma12_hlaf_irq_en : 1; unsigned dma12_pkg_irq_en : 1; unsigned dma12_queue_irq_en : 1; unsigned unused4 : 1; unsigned dma13_hlaf_irq_en : 1; unsigned dma13_pkg_irq_en : 1; unsigned dma13_queue_irq_en : 1; unsigned unused5 : 1; unsigned dma14_hlaf_irq_en : 1; unsigned dma14_pkg_irq_en : 1; unsigned dma14_queue_irq_en : 1; unsigned unused6 : 1; unsigned dma15_hlaf_irq_en : 1; unsigned dma15_pkg_irq_en : 1; unsigned dma15_queue_irq_en : 1; unsigned unused7 : 1; } b; unsigned long w; } DMA_IRQ_EN_REG1

3) DMA_IRQ_PEND_REG0 | 0x0010

typedef union dma_irq_pend_reg0 { struct { unsigned dma0_hlaf_irq_pend : 1; unsigned dma0_pkg_irq_pend : 1; unsigned dma0_queue_irq_pend : 1; unsigned unused0 : 1; unsigned dma1_hlaf_irq_pend : 1; unsigned dma1_pkg_irq_pend : 1; unsigned dma1_queue_irq_pend : 1; unsigned unused1 : 1; unsigned dma2_hlaf_irq_pend : 1; unsigned dma2_pkg_irq_pend : 1; unsigned dma2_queue_irq_pend : 1; unsigned unused2 : 1; unsigned dma3_hlaf_irq_pend : 1; unsigned dma3_pkg_irq_pend : 1; unsigned dma3_queue_irq_pend : 1; unsigned unused3 : 1; unsigned dma4_hlaf_irq_pend : 1; unsigned dma4_pkg_irq_pend : 1; unsigned dma4_queue_irq_pend : 1; unsigned unused4 : 1; unsigned dma5_hlaf_irq_pend : 1; unsigned dma5_pkg_irq_pend : 1; unsigned dma5_queue_irq_pend : 1; unsigned unused5 : 1; unsigned dma6_hlaf_irq_pend : 1; unsigned dma6_pkg_irq_pend : 1; unsigned dma6_queue_irq_pend : 1; unsigned unused6 : 1; unsigned dma7_hlaf_irq_pend : 1; unsigned dma7_pkg_irq_pend : 1; unsigned dma7_queue_irq_pend : 1; unsigned unused7 : 1; } b; unsigned long w; } DMA_IRQ_PEND_REG0

4) DMA_IRQ_PEND_REG1 | 0x0014

typedef union dma_irq_pend_reg1 { struct { unsigned dma8_hlaf_irq_pend : 1; unsigned dma8_pkg_irq_pend : 1; unsigned dma8_queue_irq_pend : 1; unsigned unused0 : 1; unsigned dma9_hlaf_irq_pend : 1; unsigned dma9_pkg_irq_pend : 1; unsigned dma9_queue_irq_pend : 1; unsigned unused1 : 1; unsigned dma10_hlaf_irq_pend : 1; unsigned dma10_pkg_irq_pend : 1; unsigned dma10_queue_irq_pend : 1; unsigned unused2 : 1; unsigned dma11_hlaf_irq_pend : 1; unsigned dma11_pkg_irq_pend : 1; unsigned dma11_queue_irq_pend : 1; unsigned unused3 : 1; unsigned dma12_hlaf_irq_pend : 1; unsigned dma12_pkg_irq_pend : 1; unsigned dma12_queue_irq_pend : 1; unsigned unused4 : 1; unsigned dma13_hlaf_irq_pend : 1; unsigned dma13_pkg_irq_pend : 1; unsigned dma13_queue_irq_pend : 1; unsigned unused5 : 1; unsigned dma14_hlaf_irq_pend : 1; unsigned dma14_pkg_irq_pend : 1; unsigned dma14_queue_irq_pend : 1; unsigned unused6 : 1; unsigned dma15_hlaf_irq_pend : 1; unsigned dma15_pkg_irq_pend : 1; unsigned dma15_queue_irq_pend : 1; unsigned unused7 : 1; } b; unsigned long w; } DMA_IRQ_PEND_REG1

5) DMA_SEC_REG | 0x0020

typedef union dma_sec_reg { struct { unsigned dma0_sec : 1; unsigned dma1_sec : 1; unsigned dma2_sec : 1; unsigned dma3_sec : 1; unsigned dma4_sec : 1; unsigned dma5_sec : 1; unsigned dma6_sec : 1; unsigned dma7_sec : 1; unsigned dma8_sec : 1; unsigned dma9_sec : 1; unsigned dma10_sec : 1; unsigned dma11_sec : 1; unsigned dma12_sec : 1; unsigned dma13_sec : 1; unsigned dma14_sec : 1; unsigned dma15_sec : 1; unsigned unused0 : 16; } b; unsigned long w; } DMA_SEC_REG

6) DMA_AUTO_GATE_REG | 0x0028

typedef union dma_auto_gate_reg { struct { unsigned dma_chan_circuit : 1; unsigned dma_common_circuit : 1; unsigned dma_mclk_circuit : 1; unsigned unused0 : 29; } b; unsigned long w; } DMA_AUTO_GATE_REG

7) DMA_STA_REG | 0x0030

typedef union dma_sta_reg { struct { unsigned dma0_status : 1; unsigned dma1_status : 1; unsigned dma2_status : 1; unsigned dma3_status : 1; unsigned dma4_status : 1; unsigned dma5_status : 1; unsigned dma6_status : 1; unsigned dma7_status : 1; unsigned dma8_status : 1; unsigned dma9_status : 1; unsigned dma10_status : 1; unsigned dma11_status : 1; unsigned dma12_status : 1; unsigned dma13_status : 1; unsigned dma14_status : 1; unsigned dma15_status : 1; unsigned unused0 : 14; unsigned mbus_fifo_status : 1; unsigned unused1 : 1; } b; unsigned long w; } DMA_STA_REG

8) DMA_EN_REG | 0x0100+N*0x0040

typedef union dma_en_reg { struct { unsigned dma_en : 1; unsigned unused0 : 31; } b; unsigned long w; } DMA_EN_REG

9) DMA_PAU_REG | 0x0100+N*0x0040+0x0004

typedef union dma_pau_reg { struct { unsigned dma_pause : 1; unsigned unused0 : 31; } b; unsigned long w; } DMA_PAU_REG

10) DMA_DESC_ADDR_REG | 0x0100+N*0x0040+0x0008

typedef union dma_desc_addr_reg { struct { unsigned dma_desc_high_addr : 2; unsigned dma_desc_low_addr : 30; } b; unsigned long w; } DMA_DESC_ADDR_REG

11) DMA_CFG_REG | 0x0100+N*0x0040+0x000C

typedef union dma_cfg_reg { struct { unsigned dma_src_drq_type : 6; unsigned dma_src_block_size : 2; unsigned dma_src_addr_mode : 1; unsigned dma_src_data_width : 2; unsigned unused0 : 5; unsigned dma_dest_drq_type : 6; unsigned dma_dest_block_size : 2; unsigned dma_addr_mode : 1; unsigned dma_dest_data_width : 2; unsigned unused1 : 5; } b; unsigned long w; } DMA_CFG_REG

12) DMA_CUR_SRC_REG | 0x0100+N*0x0040+0x0010

typedef union dma_cur_src_reg { struct { unsigned dma_cur_src : 32; } b; unsigned long w; } DMA_CUR_SRC_REG

13) DMA_CUR_DEST_REG | 0x0100+N*0x0040+0x0014

typedef union dma_cur_dest_reg { struct { unsigned dma_cur_dest : 32; } b; unsigned long w; } DMA_CUR_DEST_REG

14) DMA_BCNT_LEFT_REG | 0x0100+N*0x0040+0x0018

typedef union dma_bcnt_left_reg { struct { unsigned dma_bcnt_left : 25; unsigned unused0 : 7; } b; unsigned long w; } DMA_BCNT_LEFT_REG

15) DMA_PARA_REG | 0x0100+N*0x0040+0x001C

typedef union dma_para_reg { struct { unsigned wait_cyc : 8; unsigned unused0 : 24; } b; unsigned long w; } DMA_PARA_REG

16) DMA_MODE_REG | 0x0100+N*0x0040+0x0028

typedef union dma_mode_reg { struct { unsigned unused0 : 2; unsigned dma_src_mode : 1; unsigned dma_dst_mode : 1; unsigned unused1 : 28; } b; unsigned long w; } DMA_MODE_REG

17) DMA_FDESC_ADDR_REG | 0x0100+N*0x0040+0x002C

typedef union dma_fdesc_addr_reg { struct { unsigned dma_fdesc_addr : 32; } b; unsigned long w; } DMA_FDESC_ADDR_REG

18) DMA_PKG_NUM_REG | 0x0100+N*0x0040+0x0030

typedef union dma_pkg_num_reg { struct { unsigned dma_pkg_num : 32; } b; unsigned long w; } DMA_PKG_NUM_REG