Одноплатный компьютер Radxa Cubie A5E
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Дерево устройств FDT
/
    {
    model = "sun55iw3";
    interrupt-parent = <0x00000001>;
    #address-cells = <0x00000002>;
    #size-cells = <0x00000002>;
    board = "a527", "a527-cubie-a5-axp717c";
    compatible = "allwinner,a523", "arm,sun55iw3p1";
    memory
      {
      reg = <0x00000000 0x40000000 0x00000000 0x80000000>;
      device_type = "memory";
      };
    aliases
      {
      mmc0 = "/ soc@3000000/ sdmmc@4020000";
      serial0 = "/ soc@3000000/ uart@2500000";
      serial1 = "/ soc@3000000/ uart@2500400";
      serial2 = "/ soc@3000000/ uart@2500800";
      serial3 = "/ soc@3000000/ uart@2500c00";
      serial4 = "/ soc@3000000/ uart@2501000";
      serial5 = "/ soc@3000000/ uart@2501400";
      serial6 = "/ soc@3000000/ uart@2501800";
      serial7 = "/ soc@3000000/ uart@2501c00";
      serial8 = "/ soc@3000000/ uart@7080000";
      serial9 = "/ soc@3000000/ uart@7080400";
      ir0 = "/ soc@3000000/ irrx@2005000";
      ir1 = "/ soc@3000000/ s_irrx@7040000";
      ir2 = "/ soc@3000000/ irtx@2003000";
      pcie = "/ soc@3000000/ pcie@4800000";
      gpadc0 = "/ soc@3000000/ gpadc0@2009000";
      gpadc1 = "/ soc@3000000/ gpadc1@2009c00";
      twi0 = "/ soc@3000000/ twi0@2502000";
      twi1 = "/ soc@3000000/ twi1@2502400";
      twi2 = "/ soc@3000000/ twi2@2502800";
      twi3 = "/ soc@3000000/ twi3@2502c00";
      twi4 = "/ soc@3000000/ twi4@2503000";
      twi5 = "/ soc@3000000/ twi5@2503400";
      twi6 = "/ soc@3000000/ s_twi0@7081400";
      twi7 = "/ soc@3000000/ s_twi1@7081800";
      twi8 = "/ soc@3000000/ s_twi2@7081c00";
      spi0 = "/ soc@3000000/ spi@4025000";
      spi1 = "/ soc@3000000/ spi@4026000";
      spi2 = "/ soc@3000000/ spi@4027000";
      spi3 = "/ soc@3000000/ spi@7092000";
      spif0 = "/ soc@3000000/ spif@47f0000";
      nand0 = "/ soc@3000000/ nand0@4011000";
      ve0 = "/ soc@3000000/ ve@1c0e000";
      ve1 = "/ soc@3000000/ ve1@1c0e000";
      sunxi-mmc0 = "/ soc@3000000/ sdmmc@4020000";
      sunxi-mmc2 = "/ soc@3000000/ sdmmc@4022000";
      gmac0 = "/ soc@3000000/ gmac0@4500000";
      gmac1 = "/ soc@3000000/ ethernet@4510000";
      edp0 = "/ soc@3000000/ edp0@5720000";
      nsi0 = "/ soc@3000000/ nsi-controller@2020000";
      npu = "/ soc@3000000/ npu@7122000";
      pmu0 = "/ soc@3000000/ s_twi0@7081400/ pmu@34";
      axp1530 = "/ soc@3000000/ s_twi0@7081400/ axp1530@36";
      lcd0 = "/ soc@3000000/ lcd0@1c0c000";
      hdmi = "/ soc@3000000/ hdmi@5520000";
      reg-axp1530 = "/ soc@3000000/ s_twi0@7081400/ axp1530@36/ regulators/ dcdc1";
      cpu-ext = "/ cpus/ cpu@400";
      standby-param = "/ standby_param";
      arisc-config = "/ arisc_config";
      };
    vdd-sys
      {
      compatible = "regulator-fixed";
      regulator-name = "vdd_sys";
      regulator-min-microvolt = <0x000dbba0>;
      regulator-max-microvolt = <0x000dbba0>;
      regulator-boot-on;
      regulator-always-on;
      phandle = <0x0000001d>;
      };
    reserved-memory
      {
      #address-cells = <0x00000002>;
      #size-cells = <0x00000002>;
      ranges;
      bl31
        {
        reg = <0x00000000 0x48000000 0x00000000 0x01000000>;
        };
      };
    firmware
      {
      android
        {
        compatible = "android,firmware";
        boot_devices = "soc@3000000/ 4020000.sdmmc,soc@3000000/ 4022000.sdmmc,soc@3000000";
        vbmeta
          {
          compatible = "android,vbmeta";
          parts = "vbmeta,vbmeta_system,vbmeta_vendor,boot,init_boot";
          };
        };
      optee
        {
        compatible = "linaro,optee-tz";
        method = "smc";
        };
      };
    cpus
      {
      #address-cells = <0x00000002>;
      #size-cells = <0x00000000>;
      cpu@0
        {
        device_type = "cpu";
        compatible = "arm,cortex-a55";
        reg = <0x00000000 0x00000000>;
        enable-method = "psci";
        cpu-idle-states = <0x00000002 0x00000003>;
        capacity-dmips-mhz = <0x0000039a>;
        clocks = <0x00000004 0x00000001>;
        operating-points-v2 = <0x00000005>;
        #cooling-cells = <0x00000002>;
        dynamic-power-coefficient = <0x0000011e>;
        cpu-supply = <0x00000006>;
        phandle = <0x00000009>;
        };
      cpu@100
        {
        device_type = "cpu";
        compatible = "arm,cortex-a55";
        reg = <0x00000000 0x00000100>;
        enable-method = "psci";
        cpu-idle-states = <0x00000002 0x00000003>;
        capacity-dmips-mhz = <0x0000039a>;
        clocks = <0x00000004 0x00000001>;
        operating-points-v2 = <0x00000005>;
        #cooling-cells = <0x00000002>;
        phandle = <0x0000000a>;
        };
      cpu@200
        {
        device_type = "cpu";
        compatible = "arm,cortex-a55";
        reg = <0x00000000 0x00000200>;
        enable-method = "psci";
        cpu-idle-states = <0x00000002 0x00000003>;
        capacity-dmips-mhz = <0x0000039a>;
        clocks = <0x00000004 0x00000001>;
        operating-points-v2 = <0x00000005>;
        #cooling-cells = <0x00000002>;
        phandle = <0x0000000b>;
        };
      cpu@300
        {
        device_type = "cpu";
        compatible = "arm,cortex-a55";
        reg = <0x00000000 0x00000300>;
        enable-method = "psci";
        cpu-idle-states = <0x00000002 0x00000003>;
        capacity-dmips-mhz = <0x0000039a>;
        clocks = <0x00000004 0x00000001>;
        operating-points-v2 = <0x00000005>;
        #cooling-cells = <0x00000002>;
        phandle = <0x0000000c>;
        };
      cpu@400
        {
        device_type = "cpu";
        compatible = "arm,cortex-a55";
        reg = <0x00000000 0x00000400>;
        enable-method = "psci";
        cpu-idle-states = <0x00000002 0x00000003>;
        capacity-dmips-mhz = <0x00000400>;
        clocks = <0x00000004 0x00000003>;
        operating-points-v2 = <0x00000007>;
        #cooling-cells = <0x00000002>;
        dynamic-power-coefficient = <0x00000162>;
        cpu-supply = <0x00000008>;
        phandle = <0x0000000d>;
        };
      cpu@500
        {
        device_type = "cpu";
        compatible = "arm,cortex-a55";
        reg = <0x00000000 0x00000500>;
        enable-method = "psci";
        cpu-idle-states = <0x00000002 0x00000003>;
        capacity-dmips-mhz = <0x00000400>;
        clocks = <0x00000004 0x00000003>;
        operating-points-v2 = <0x00000007>;
        #cooling-cells = <0x00000002>;
        phandle = <0x0000000e>;
        };
      cpu@600
        {
        device_type = "cpu";
        compatible = "arm,cortex-a55";
        reg = <0x00000000 0x00000600>;
        enable-method = "psci";
        cpu-idle-states = <0x00000002 0x00000003>;
        capacity-dmips-mhz = <0x00000400>;
        clocks = <0x00000004 0x00000003>;
        operating-points-v2 = <0x00000007>;
        #cooling-cells = <0x00000002>;
        phandle = <0x0000000f>;
        };
      cpu@700
        {
        device_type = "cpu";
        compatible = "arm,cortex-a55";
        reg = <0x00000000 0x00000700>;
        enable-method = "psci";
        cpu-idle-states = <0x00000002 0x00000003>;
        capacity-dmips-mhz = <0x00000400>;
        clocks = <0x00000004 0x00000003>;
        operating-points-v2 = <0x00000007>;
        #cooling-cells = <0x00000002>;
        phandle = <0x00000010>;
        };
      cpu-map
        {
        cluster0
          {
          core0
            {
            cpu = <0x00000009>;
            };
          core1
            {
            cpu = <0x0000000a>;
            };
          core2
            {
            cpu = <0x0000000b>;
            };
          core3
            {
            cpu = <0x0000000c>;
            };
          };
        cluster1
          {
          core0
            {
            cpu = <0x0000000d>;
            };
          core1
            {
            cpu = <0x0000000e>;
            };
          core2
            {
            cpu = <0x0000000f>;
            };
          core3
            {
            cpu = <0x00000010>;
            };
          };
        };
      idle-states
        {
        entry-method = "arm,psci";
        cpu-sleep-0
          {
          compatible = "arm,idle-state";
          arm,psci-suspend-param = <0x00010000>;
          entry-latency-us = <0x0000002e>;
          exit-latency-us = <0x0000003b>;
          min-residency-us = <0x00000df2>;
          local-timer-stop;
          phandle = <0x00000002>;
          };
        cluster-sleep-0
          {
          compatible = "arm,idle-state";
          arm,psci-suspend-param = <0x01010000>;
          entry-latency-us = <0x0000002f>;
          exit-latency-us = <0x0000004a>;
          min-residency-us = <0x00001388>;
          local-timer-stop;
          phandle = <0x00000003>;
          };
        };
      };
    vf_mapping_table
      {
      vf-version = "v0.71";
      table = * 0xbbe142d8 [0x00000058];
      phandle = <0x000000fe>;
      };
    gpu_vf_mapping_table
      {
      table = <0x00000001 0x00000001 0x00000002 0x00000002 0x00000012 0x00000015 0x00000004 0x00000003 0x00000014 0x0000001f 0x00000005 0x00000004 0x00000006 0x00000005>;
      phandle = <0x000000ff>;
      };
    npu_vf_mapping_table
      {
      table = * 0xbbe143e0 [0x00000050];
      phandle = <0x00000100>;
      };
    cluster0-opp-table
      {
      compatible = "allwinner,sun50i-operating-points";
      opp-shared;
      phandle = <0x00000005>;
      opp@408000000
        {
        opp-hz = <0x00000000 0x18519600>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x000dbba0>;
        opp-microvolt-vf0100 = <0x000dbba0>;
        opp-microvolt-vf0102 = <0x000dbba0>;
        opp-microvolt-vf0200 = <0x000dbba0>;
        opp-microvolt-vf0201 = <0x000dbba0>;
        opp-microvolt-vf0300 = <0x000dbba0>;
        opp-microvolt-vf0301 = <0x000dbba0>;
        opp-microvolt-vf0302 = <0x000dbba0>;
        opp-microvolt-vf0400 = <0x000dbba0>;
        opp-microvolt-vf0500 = <0x000dbba0>;
        opp-microvolt-vf0502 = <0x000dbba0>;
        };
      opp@672000000
        {
        opp-hz = <0x00000000 0x280de800>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000dbba0>;
        opp-microvolt-vf0102 = <0x000dbba0>;
        opp-microvolt-vf0200 = <0x000dbba0>;
        opp-microvolt-vf0201 = <0x000dbba0>;
        opp-microvolt-vf0300 = <0x000dbba0>;
        opp-microvolt-vf0301 = <0x000dbba0>;
        opp-microvolt-vf0302 = <0x000dbba0>;
        opp-microvolt-vf0400 = <0x000dbba0>;
        opp-microvolt-vf0500 = <0x000dbba0>;
        opp-microvolt-vf0502 = <0x000dbba0>;
        };
      opp@720000000
        {
        opp-hz = <0x00000000 0x2aea5400>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x000dbba0>;
        opp-microvolt-vf0100 = <0x00000000>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00000000>;
        opp-microvolt-vf0201 = <0x00000000>;
        opp-microvolt-vf0300 = <0x00000000>;
        opp-microvolt-vf0301 = <0x00000000>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x00000000>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@792000000
        {
        opp-hz = <0x00000000 0x2f34f600>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000dbba0>;
        opp-microvolt-vf0102 = <0x000dbba0>;
        opp-microvolt-vf0200 = <0x000dbba0>;
        opp-microvolt-vf0201 = <0x000dbba0>;
        opp-microvolt-vf0300 = <0x000dbba0>;
        opp-microvolt-vf0301 = <0x000dbba0>;
        opp-microvolt-vf0302 = <0x000dbba0>;
        opp-microvolt-vf0400 = <0x000dbba0>;
        opp-microvolt-vf0500 = <0x000dbba0>;
        opp-microvolt-vf0502 = <0x000dbba0>;
        };
      opp@936000000
        {
        opp-hz = <0x00000000 0x37ca3a00>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x000dbba0>;
        opp-microvolt-vf0100 = <0x000e09c0>;
        opp-microvolt-vf0102 = <0x000e09c0>;
        opp-microvolt-vf0200 = <0x000e09c0>;
        opp-microvolt-vf0201 = <0x000e09c0>;
        opp-microvolt-vf0300 = <0x000dbba0>;
        opp-microvolt-vf0301 = <0x000dbba0>;
        opp-microvolt-vf0302 = <0x000dbba0>;
        opp-microvolt-vf0400 = <0x000dbba0>;
        opp-microvolt-vf0500 = <0x000dbba0>;
        opp-microvolt-vf0502 = <0x000dbba0>;
        };
      opp@1008000000
        {
        opp-hz = <0x00000000 0x3c14dc00>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000ea600>;
        opp-microvolt-vf0102 = <0x000ea600>;
        opp-microvolt-vf0200 = <0x000ea600>;
        opp-microvolt-vf0201 = <0x000ea600>;
        opp-microvolt-vf0300 = <0x000e09c0>;
        opp-microvolt-vf0301 = <0x000e09c0>;
        opp-microvolt-vf0302 = <0x000e09c0>;
        opp-microvolt-vf0400 = <0x00000000>;
        opp-microvolt-vf0500 = <0x000e09c0>;
        opp-microvolt-vf0502 = <0x000e09c0>;
        };
      opp@1032000000
        {
        opp-hz = <0x00000000 0x3d831200>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x00000000>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00000000>;
        opp-microvolt-vf0201 = <0x00000000>;
        opp-microvolt-vf0300 = <0x00000000>;
        opp-microvolt-vf0301 = <0x00000000>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x000e09c0>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1104000000
        {
        opp-hz = <0x00000000 0x41cdb400>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000f4240>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x000f4240>;
        opp-microvolt-vf0201 = <0x000f4240>;
        opp-microvolt-vf0300 = <0x000ea600>;
        opp-microvolt-vf0301 = <0x000ea600>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x00000000>;
        opp-microvolt-vf0500 = <0x000ea600>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1128000000
        {
        opp-hz = <0x00000000 0x433bea00>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x000f4240>;
        opp-microvolt-vf0100 = <0x00000000>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00000000>;
        opp-microvolt-vf0201 = <0x00000000>;
        opp-microvolt-vf0300 = <0x00000000>;
        opp-microvolt-vf0301 = <0x00000000>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x000ea600>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1224000000
        {
        opp-hz = <0x00000000 0x48f4c200>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00100590>;
        opp-microvolt-vf0100 = <0x00100590>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00100590>;
        opp-microvolt-vf0201 = <0x00100590>;
        opp-microvolt-vf0300 = <0x000f4240>;
        opp-microvolt-vf0301 = <0x000f4240>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x000f4240>;
        opp-microvolt-vf0500 = <0x000f4240>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1296000000
        {
        opp-hz = <0x00000000 0x4d3f6400>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x0010c8e0>;
        opp-microvolt-vf0100 = <0x00000000>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00000000>;
        opp-microvolt-vf0201 = <0x00000000>;
        opp-microvolt-vf0300 = <0x00000000>;
        opp-microvolt-vf0301 = <0x00000000>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x00000000>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1320000000
        {
        opp-hz = <0x00000000 0x4ead9a00>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x00111700>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00111700>;
        opp-microvolt-vf0201 = <0x00111700>;
        opp-microvolt-vf0300 = <0x00100590>;
        opp-microvolt-vf0301 = <0x00100590>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x00100590>;
        opp-microvolt-vf0500 = <0x00100590>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1416000000
        {
        opp-hz = <0x00000000 0x54667200>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00118c30>;
        opp-microvolt-vf0100 = <0x00118c30>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00118c30>;
        opp-microvolt-vf0201 = <0x00118c30>;
        opp-microvolt-vf0300 = <0x0010c8e0>;
        opp-microvolt-vf0301 = <0x0010c8e0>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x0010c8e0>;
        opp-microvolt-vf0500 = <0x0010c8e0>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      };
    cluster1-opp-table
      {
      compatible = "allwinner,sun50i-operating-points";
      opp-shared;
      phandle = <0x00000007>;
      opp@408000000
        {
        opp-hz = <0x00000000 0x18519600>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x000dbba0>;
        opp-microvolt-vf0100 = <0x000dbba0>;
        opp-microvolt-vf0102 = <0x000dbba0>;
        opp-microvolt-vf0200 = <0x000dbba0>;
        opp-microvolt-vf0201 = <0x000dbba0>;
        opp-microvolt-vf0300 = <0x000dbba0>;
        opp-microvolt-vf0301 = <0x000dbba0>;
        opp-microvolt-vf0302 = <0x000dbba0>;
        opp-microvolt-vf0400 = <0x000dbba0>;
        opp-microvolt-vf0500 = <0x000dbba0>;
        opp-microvolt-vf0502 = <0x000dbba0>;
        };
      opp@672000000
        {
        opp-hz = <0x00000000 0x280de800>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000dbba0>;
        opp-microvolt-vf0102 = <0x000dbba0>;
        opp-microvolt-vf0200 = <0x000dbba0>;
        opp-microvolt-vf0201 = <0x000dbba0>;
        opp-microvolt-vf0300 = <0x000dbba0>;
        opp-microvolt-vf0301 = <0x000dbba0>;
        opp-microvolt-vf0302 = <0x000dbba0>;
        opp-microvolt-vf0400 = <0x000dbba0>;
        opp-microvolt-vf0500 = <0x000dbba0>;
        opp-microvolt-vf0502 = <0x000dbba0>;
        };
      opp@720000000
        {
        opp-hz = <0x00000000 0x2aea5400>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x000dbba0>;
        opp-microvolt-vf0100 = <0x00000000>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00000000>;
        opp-microvolt-vf0201 = <0x00000000>;
        opp-microvolt-vf0300 = <0x00000000>;
        opp-microvolt-vf0301 = <0x00000000>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x00000000>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@840000000
        {
        opp-hz = <0x00000000 0x32116200>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000dbba0>;
        opp-microvolt-vf0102 = <0x000dbba0>;
        opp-microvolt-vf0200 = <0x000dbba0>;
        opp-microvolt-vf0201 = <0x000dbba0>;
        opp-microvolt-vf0300 = <0x000dbba0>;
        opp-microvolt-vf0301 = <0x000dbba0>;
        opp-microvolt-vf0302 = <0x000dbba0>;
        opp-microvolt-vf0400 = <0x000dbba0>;
        opp-microvolt-vf0500 = <0x000dbba0>;
        opp-microvolt-vf0502 = <0x000dbba0>;
        };
      opp@1008000000
        {
        opp-hz = <0x00000000 0x3c14dc00>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000dbba0>;
        opp-microvolt-vf0102 = <0x000dbba0>;
        opp-microvolt-vf0200 = <0x000dbba0>;
        opp-microvolt-vf0201 = <0x000dbba0>;
        opp-microvolt-vf0300 = <0x000dbba0>;
        opp-microvolt-vf0301 = <0x000dbba0>;
        opp-microvolt-vf0302 = <0x000dbba0>;
        opp-microvolt-vf0400 = <0x000dbba0>;
        opp-microvolt-vf0500 = <0x000dbba0>;
        opp-microvolt-vf0502 = <0x000dbba0>;
        };
      opp@1200000000
        {
        opp-hz = <0x00000000 0x47868c00>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000e09c0>;
        opp-microvolt-vf0102 = <0x000e09c0>;
        opp-microvolt-vf0200 = <0x000e09c0>;
        opp-microvolt-vf0201 = <0x000e09c0>;
        opp-microvolt-vf0300 = <0x000e09c0>;
        opp-microvolt-vf0301 = <0x000e09c0>;
        opp-microvolt-vf0302 = <0x000e09c0>;
        opp-microvolt-vf0400 = <0x000e09c0>;
        opp-microvolt-vf0500 = <0x000e09c0>;
        opp-microvolt-vf0502 = <0x000e09c0>;
        };
      opp@1248000000
        {
        opp-hz = <0x00000000 0x4a62f800>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x000dbba0>;
        opp-microvolt-vf0100 = <0x00000000>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00000000>;
        opp-microvolt-vf0201 = <0x00000000>;
        opp-microvolt-vf0300 = <0x00000000>;
        opp-microvolt-vf0301 = <0x00000000>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x00000000>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1344000000
        {
        opp-hz = <0x00000000 0x501bd000>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000ea600>;
        opp-microvolt-vf0102 = <0x000ea600>;
        opp-microvolt-vf0200 = <0x000ea600>;
        opp-microvolt-vf0201 = <0x000ea600>;
        opp-microvolt-vf0300 = <0x000ea600>;
        opp-microvolt-vf0301 = <0x000ea600>;
        opp-microvolt-vf0302 = <0x000ea600>;
        opp-microvolt-vf0400 = <0x000ea600>;
        opp-microvolt-vf0500 = <0x000ea600>;
        opp-microvolt-vf0502 = <0x000ea600>;
        };
      opp@1488000000
        {
        opp-hz = <0x00000000 0x58b11400>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x000f4240>;
        opp-microvolt-vf0100 = <0x000f4240>;
        opp-microvolt-vf0102 = <0x000f4240>;
        opp-microvolt-vf0200 = <0x000f4240>;
        opp-microvolt-vf0201 = <0x000f4240>;
        opp-microvolt-vf0300 = <0x000f4240>;
        opp-microvolt-vf0301 = <0x000f4240>;
        opp-microvolt-vf0302 = <0x000f4240>;
        opp-microvolt-vf0400 = <0x000f4240>;
        opp-microvolt-vf0500 = <0x000f4240>;
        opp-microvolt-vf0502 = <0x000f4240>;
        };
      opp@1584000000
        {
        opp-hz = <0x00000000 0x5e69ec00>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00100590>;
        opp-microvolt-vf0100 = <0x00100590>;
        opp-microvolt-vf0102 = <0x00100590>;
        opp-microvolt-vf0200 = <0x00100590>;
        opp-microvolt-vf0201 = <0x00100590>;
        opp-microvolt-vf0300 = <0x00100590>;
        opp-microvolt-vf0301 = <0x00100590>;
        opp-microvolt-vf0302 = <0x00100590>;
        opp-microvolt-vf0400 = <0x00100590>;
        opp-microvolt-vf0500 = <0x00100590>;
        opp-microvolt-vf0502 = <0x00100590>;
        };
      opp@1680000000
        {
        opp-hz = <0x00000000 0x6422c400>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x0010c8e0>;
        opp-microvolt-vf0100 = <0x0010c8e0>;
        opp-microvolt-vf0102 = <0x0010c8e0>;
        opp-microvolt-vf0200 = <0x0010c8e0>;
        opp-microvolt-vf0201 = <0x0010c8e0>;
        opp-microvolt-vf0300 = <0x0010c8e0>;
        opp-microvolt-vf0301 = <0x0010c8e0>;
        opp-microvolt-vf0302 = <0x0010c8e0>;
        opp-microvolt-vf0400 = <0x0010c8e0>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1800000000
        {
        opp-hz = <0x00000000 0x6b49d200>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00118c30>;
        opp-microvolt-vf0100 = <0x00118c30>;
        opp-microvolt-vf0102 = <0x00118c30>;
        opp-microvolt-vf0200 = <0x00118c30>;
        opp-microvolt-vf0201 = <0x00118c30>;
        opp-microvolt-vf0300 = <0x00118c30>;
        opp-microvolt-vf0301 = <0x00118c30>;
        opp-microvolt-vf0302 = <0x00118c30>;
        opp-microvolt-vf0400 = <0x00118c30>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1992000000
        {
        opp-hz = <0x00000000 0x76bb8200>;
        clock-latency-ns = <0x0003b9b0>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x00000000>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00000000>;
        opp-microvolt-vf0201 = <0x00000000>;
        opp-microvolt-vf0300 = <0x00000000>;
        opp-microvolt-vf0301 = <0x00000000>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x00129da0>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      };
    dsufreq@0
      {
      compatible = "allwinner,sun55iw3-dsufreq";
      reg = <0x00000000 0x08815000 0x00000000 0x00001000>;
      clocks = <0x00000004 0x00000002>;
      operating-points-v2 = <0x00000011>;
      dsu-supply = <0x00000006>;
      phandle = <0x00000101>;
      };
    dsu-opp-table
      {
      compatible = "allwinner,dsu-operating-points";
      phandle = <0x00000011>;
      opp@288000000
        {
        opp-hz = <0x00000000 0x112a8800>;
        opp-microvolt-vf0000 = <0x000dbba0>;
        opp-microvolt-vf0100 = <0x00000000>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00000000>;
        opp-microvolt-vf0201 = <0x00000000>;
        opp-microvolt-vf0300 = <0x00000000>;
        opp-microvolt-vf0301 = <0x00000000>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x00000000>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@408000000
        {
        opp-hz = <0x00000000 0x18519600>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000dbba0>;
        opp-microvolt-vf0102 = <0x000dbba0>;
        opp-microvolt-vf0200 = <0x000dbba0>;
        opp-microvolt-vf0201 = <0x000dbba0>;
        opp-microvolt-vf0300 = <0x000dbba0>;
        opp-microvolt-vf0301 = <0x000dbba0>;
        opp-microvolt-vf0302 = <0x000dbba0>;
        opp-microvolt-vf0400 = <0x000dbba0>;
        opp-microvolt-vf0500 = <0x000dbba0>;
        opp-microvolt-vf0502 = <0x000dbba0>;
        };
      opp@528000000
        {
        opp-hz = <0x00000000 0x1f78a400>;
        opp-microvolt-vf0000 = <0x000dbba0>;
        opp-microvolt-vf0100 = <0x00000000>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00000000>;
        opp-microvolt-vf0201 = <0x00000000>;
        opp-microvolt-vf0300 = <0x00000000>;
        opp-microvolt-vf0301 = <0x00000000>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x00000000>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@600000000
        {
        opp-hz = <0x00000000 0x23c34600>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000dbba0>;
        opp-microvolt-vf0102 = <0x000dbba0>;
        opp-microvolt-vf0200 = <0x000dbba0>;
        opp-microvolt-vf0201 = <0x000dbba0>;
        opp-microvolt-vf0300 = <0x000dbba0>;
        opp-microvolt-vf0301 = <0x000dbba0>;
        opp-microvolt-vf0302 = <0x000dbba0>;
        opp-microvolt-vf0400 = <0x000dbba0>;
        opp-microvolt-vf0500 = <0x000dbba0>;
        opp-microvolt-vf0502 = <0x000dbba0>;
        };
      opp@696000000
        {
        opp-hz = <0x00000000 0x297c1e00>;
        opp-microvolt-vf0000 = <0x000dbba0>;
        opp-microvolt-vf0100 = <0x000dbba0>;
        opp-microvolt-vf0102 = <0x000dbba0>;
        opp-microvolt-vf0200 = <0x000dbba0>;
        opp-microvolt-vf0201 = <0x000dbba0>;
        opp-microvolt-vf0300 = <0x000dbba0>;
        opp-microvolt-vf0301 = <0x000dbba0>;
        opp-microvolt-vf0302 = <0x000dbba0>;
        opp-microvolt-vf0400 = <0x000dbba0>;
        opp-microvolt-vf0500 = <0x000dbba0>;
        opp-microvolt-vf0502 = <0x000dbba0>;
        };
      opp@792000000
        {
        opp-hz = <0x00000000 0x2f34f600>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000e09c0>;
        opp-microvolt-vf0102 = <0x000e09c0>;
        opp-microvolt-vf0200 = <0x000e09c0>;
        opp-microvolt-vf0201 = <0x000e09c0>;
        opp-microvolt-vf0300 = <0x000dbba0>;
        opp-microvolt-vf0301 = <0x000dbba0>;
        opp-microvolt-vf0302 = <0x000dbba0>;
        opp-microvolt-vf0400 = <0x000dbba0>;
        opp-microvolt-vf0500 = <0x000dbba0>;
        opp-microvolt-vf0502 = <0x000dbba0>;
        };
      opp@864000000
        {
        opp-hz = <0x00000000 0x337f9800>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000ea600>;
        opp-microvolt-vf0102 = <0x000ea600>;
        opp-microvolt-vf0200 = <0x000ea600>;
        opp-microvolt-vf0201 = <0x000ea600>;
        opp-microvolt-vf0300 = <0x000e09c0>;
        opp-microvolt-vf0301 = <0x000e09c0>;
        opp-microvolt-vf0302 = <0x000e09c0>;
        opp-microvolt-vf0400 = <0x000e09c0>;
        opp-microvolt-vf0500 = <0x000e09c0>;
        opp-microvolt-vf0502 = <0x000e09c0>;
        };
      opp@936000000
        {
        opp-hz = <0x00000000 0x37ca3a00>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x000f4240>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x000f4240>;
        opp-microvolt-vf0201 = <0x000f4240>;
        opp-microvolt-vf0300 = <0x000ea600>;
        opp-microvolt-vf0301 = <0x000ea600>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x000ea600>;
        opp-microvolt-vf0500 = <0x000ea600>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@984000000
        {
        opp-hz = <0x00000000 0x3aa6a600>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x00100590>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00100590>;
        opp-microvolt-vf0201 = <0x00100590>;
        opp-microvolt-vf0300 = <0x000f4240>;
        opp-microvolt-vf0301 = <0x000f4240>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x000f4240>;
        opp-microvolt-vf0500 = <0x000f4240>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1008000000
        {
        opp-hz = <0x00000000 0x3c14dc00>;
        opp-microvolt-vf0000 = <0x000f4240>;
        opp-microvolt-vf0100 = <0x00000000>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00000000>;
        opp-microvolt-vf0201 = <0x00000000>;
        opp-microvolt-vf0300 = <0x00000000>;
        opp-microvolt-vf0301 = <0x00000000>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x00000000>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1056000000
        {
        opp-hz = <0x00000000 0x3ef14800>;
        opp-microvolt-vf0000 = <0x00000000>;
        opp-microvolt-vf0100 = <0x00111700>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00111700>;
        opp-microvolt-vf0201 = <0x00111700>;
        opp-microvolt-vf0300 = <0x00100590>;
        opp-microvolt-vf0301 = <0x00100590>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x00100590>;
        opp-microvolt-vf0500 = <0x00100590>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1104000000
        {
        opp-hz = <0x00000000 0x41cdb400>;
        opp-microvolt-vf0000 = <0x00100590>;
        opp-microvolt-vf0100 = <0x00000000>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00000000>;
        opp-microvolt-vf0201 = <0x00000000>;
        opp-microvolt-vf0300 = <0x00000000>;
        opp-microvolt-vf0301 = <0x00000000>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x00000000>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1128000000
        {
        opp-hz = <0x00000000 0x433bea00>;
        opp-microvolt-vf0000 = <0x0010c8e0>;
        opp-microvolt-vf0100 = <0x00000000>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00000000>;
        opp-microvolt-vf0201 = <0x00000000>;
        opp-microvolt-vf0300 = <0x00000000>;
        opp-microvolt-vf0301 = <0x00000000>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x00000000>;
        opp-microvolt-vf0500 = <0x00000000>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      opp@1152000000
        {
        opp-hz = <0x00000000 0x44aa2000>;
        opp-microvolt-vf0000 = <0x00118c30>;
        opp-microvolt-vf0100 = <0x00118c30>;
        opp-microvolt-vf0102 = <0x00000000>;
        opp-microvolt-vf0200 = <0x00118c30>;
        opp-microvolt-vf0201 = <0x00118c30>;
        opp-microvolt-vf0300 = <0x0010c8e0>;
        opp-microvolt-vf0301 = <0x0010c8e0>;
        opp-microvolt-vf0302 = <0x00000000>;
        opp-microvolt-vf0400 = <0x0010c8e0>;
        opp-microvolt-vf0500 = <0x0010c8e0>;
        opp-microvolt-vf0502 = <0x00000000>;
        };
      };
    thermal-zones
      {
      cpul_thermal_zone
        {
        polling-delay-passive = <0x00000064>;
        polling-delay = <0x000003e8>;
        thermal-sensors = <0x00000012 0x00000001>;
        sustainable-power = <0x000004b0>;
        phandle = <0x00000102>;
        trips
          {
          phandle = <0x00000103>;
          trip-point@0
            {
            temperature = <0x00011170>;
            type = "passive";
            hysteresis = <0x00000000>;
            phandle = <0x00000104>;
            };
          trip-point@1
            {
            temperature = <0x00015f90>;
            type = "passive";
            hysteresis = <0x00000000>;
            phandle = <0x00000013>;
            };
          cpu_crit@0
            {
            temperature = <0x0001adb0>;
            type = "critical";
            hysteresis = <0x00000000>;
            phandle = <0x00000105>;
            };
          };
        cooling-maps
          {
          map0
            {
            trip = <0x00000013>;
            cooling-device = <0x00000009 0xffffffff 0xffffffff>;
            contribution = <0x00000400>;
            };
          };
        };
      cpub_thermal_zone
        {
        polling-delay-passive = <0x00000064>;
        polling-delay = <0x000003e8>;
        thermal-sensors = <0x00000012 0x00000000>;
        sustainable-power = <0x00000640>;
        phandle = <0x00000106>;
        trips
          {
          phandle = <0x00000107>;
          trip-point@0
            {
            temperature = <0x00011170>;
            type = "passive";
            hysteresis = <0x00000000>;
            phandle = <0x00000108>;
            };
          trip-point@1
            {
            temperature = <0x00015f90>;
            type = "passive";
            hysteresis = <0x00000000>;
            phandle = <0x00000014>;
            };
          cpu_crit@0
            {
            temperature = <0x0001adb0>;
            type = "critical";
            hysteresis = <0x00000000>;
            phandle = <0x00000109>;
            };
          };
        cooling-maps
          {
          map0
            {
            trip = <0x00000014>;
            cooling-device = <0x0000000d 0xffffffff 0xffffffff>;
            contribution = <0x00000400>;
            };
          };
        };
      gpu_thermal_zone
        {
        polling-delay-passive = <0x00000064>;
        polling-delay = <0x000003e8>;
        thermal-sensors = <0x00000012 0x00000002>;
        sustainable-power = <0x00000960>;
        phandle = <0x0000010a>;
        trips
          {
          phandle = <0x0000010b>;
          trip-point@0
            {
            temperature = <0x0000ea60>;
            type = "passive";
            hysteresis = <0x00000000>;
            phandle = <0x0000010c>;
            };
          trip-point@1
            {
            temperature = <0x00015f90>;
            type = "passive";
            hysteresis = <0x00000000>;
            phandle = <0x00000015>;
            };
          gpu_crit@0
            {
            temperature = <0x0001adb0>;
            type = "critical";
            hysteresis = <0x00000000>;
            phandle = <0x0000010d>;
            };
          };
        cooling-maps
          {
          map0
            {
            trip = <0x00000015>;
            cooling-device = <0x00000016 0xffffffff 0xffffffff>;
            contribution = <0x00000400>;
            };
          };
        };
      npu_thermal_zone
        {
        polling-delay-passive = <0x00000064>;
        polling-delay = <0x000003e8>;
        thermal-sensors = <0x00000012 0x00000003>;
        };
      ddr_thermal_zone
        {
        polling-delay-passive = <0x00000000>;
        polling-delay = <0x00000000>;
        thermal-sensors = <0x00000017 0x00000000>;
        };
      };
    psci
      {
      compatible = "arm,psci-1.0";
      method = "smc";
      };
    dcxo24m_clk
      {
      #clock-cells = <0x00000000>;
      compatible = "fixed-clock";
      clock-frequency = <0x016e3600>;
      clock-output-names = "dcxo24m";
      phandle = <0x00000022>;
      };
    rc16m_clk
      {
      #clock-cells = <0x00000000>;
      compatible = "fixed-clock";
      clock-frequency = "", "-$";
      clock-accuracy = <0x11e1a300>;
      clock-output-names = "rc-16m";
      phandle = <0x00000024>;
      };
    ext32k_clk
      {
      #clock-cells = <0x00000000>;
      compatible = "fixed-clock";
      clock-frequency = <0x00008000>;
      clock-output-names = "ext-32k";
      phandle = <0x0000010e>;
      };
    interrupt-controller@3400000
      {
      compatible = "arm,gic-v3";
      #interrupt-cells = <0x00000003>;
      #address-cells = <0x00000000>;
      interrupt-controller;
      reg = <0x00000000 0x03400000 0x00000000 0x00010000 0x00000000 0x03460000 0x00000000 0x000ff004>;
      interrupt-parent = <0x00000018>;
      phandle = <0x00000018>;
      };
    interrupt-controller@0
      {
      compatible = "allwinner,sunxi-wakeupgen";
      interrupt-controller;
      #interrupt-cells = <0x00000003>;
      #address-cells = <0x00000000>;
      interrupt-parent = <0x00000018>;
      phandle = <0x00000001>;
      };
    timer_arch
      {
      compatible = "arm,armv8-timer";
      interrupts = <0x00000001 0x0000000d 0x00000f08 0x00000001 0x0000000e 0x00000f08 0x00000001 0x0000000b 0x00000f08 0x00000001 0x0000000a 0x00000f08>;
      clock-frequency = <0x016e3600>;
      interrupt-parent = <0x00000018>;
      arm,no-tick-in-suspend;
      };
    power-management@7001400
      {
      compatible = "allwinner,a523-pmu", "syscon", "simple-mfd";
      reg = <0x00000000 0x07001400 0x00000000 0x00000400>;
      phandle = <0x0000010f>;
      power-controller
        {
        compatible = "allwinner,a523-power-controller";
        clocks = <0x00000019 0x00000014>;
        clock-names = "ppu";
        resets = <0x00000019 0x0000000b>;
        reset-names = "ppu_rst";
        #power-domain-cells = <0x00000001>;
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        phandle = <0x00000021>;
        pd_dsp@0
          {
          reg = <0x00000000>;
          };
        pd_npu@1
          {
          reg = <0x00000001>;
          };
        pd_sram@3
          {
          reg = <0x00000003>;
          };
        pd_riscv@4
          {
          reg = <0x00000004>;
          };
        };
      };
    pck-600@7060000
      {
      compatible = "allwinner,a523-pck", "syscon", "simple-mfd";
      reg = <0x00000000 0x07060000 0x00000000 0x00008000>;
      phandle = <0x00000110>;
      power-controller
        {
        compatible = "allwinner,a523-pck-600";
        clocks = <0x00000019 0x00000015>;
        clock-names = "pck";
        resets = <0x00000019 0x0000000c>;
        reset-names = "pck_rst";
        #power-domain-cells = <0x00000001>;
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        phandle = <0x0000001f>;
        pd1_ve@0
          {
          reg = <0x00000000>;
          };
        pd1_vi@2
          {
          reg = <0x00000002>;
          };
        pd1_vo0@3
          {
          reg = <0x00000003>;
          };
        pd1_vo1@4
          {
          reg = <0x00000004>;
          };
        pd1_de@5
          {
          reg = <0x00000005>;
          };
        pd1_nand@6
          {
          reg = <0x00000006>;
          };
        pd1_pcie@7
          {
          reg = <0x00000007>;
          };
        };
      };
    intc-nmi@7010320
      {
      compatible = "allwinner,sun8i-nmi";
      interrupt-parent = <0x00000018>;
      #interrupt-cells = <0x00000002>;
      #address-cells = <0x00000000>;
      interrupt-controller;
      reg = <0x00000000 0x07010320 0x00000000 0x0000000c>;
      interrupts = <0x00000000 0x00000094 0x00000004>;
      phandle = <0x000000a5>;
      };
    iommu@2010000
      {
      compatible = "allwinner,iommu-v15-sun55iw3";
      reg = <0x00000000 0x02010000 0x00000000 0x00001000>;
      interrupts = <0x00000000 0x00000041 0x00000004>;
      interrupt-names = "iommu-irq";
      clocks = <0x0000001a 0x00000049>;
      clock-names = "iommu";
      #iommu-cells = <0x00000002>;
      phandle = <0x0000001e>;
      };
    dram
      {
      dram_para00 = <0x000004b0>;
      dram_para01 = <0x00000008>;
      dram_para02 = <0x07070707>;
      dram_para03 = <0x0d0d0d0d>;
      dram_para04 = <0x00000e0e>;
      dram_para05 = <0x84848484>;
      dram_para06 = <0x0000310a>;
      dram_para07 = <0x08000000>;
      dram_para08 = <0x00000000>;
      dram_para09 = <0x00000054>;
      dram_para10 = <0x0000002d>;
      dram_para11 = <0x00000033>;
      dram_para12 = <0x00000003>;
      dram_para13 = <0x00000000>;
      dram_para14 = <0x00000000>;
      dram_para15 = <0x00000004>;
      dram_para16 = <0x00000072>;
      dram_para17 = <0x00000000>;
      dram_para18 = <0x0000000e>;
      dram_para19 = <0x00000000>;
      dram_para20 = <0x00000000>;
      dram_para21 = <0x00000026>;
      dram_para22 = <0x80808080>;
      dram_para23 = <0x06060606>;
      dram_para24 = <0x1f0b0503>;
      dram_para25 = <0x00000000>;
      dram_para26 = <0x3a000000>;
      dram_para27 = <0x882f3333>;
      dram_para28 = <0xcecbc3c6>;
      dram_para29 = <0x34332d2d>;
      dram_para30 = <0x00006461>;
      dram_para31 = <0x48484848>;
      dram_para32 = <0x3837292d>;
      dram_para33 = <0x32323331>;
      dram_para34 = <0x30303332>;
      dram_para35 = <0x28273433>;
      dram_para36 = <0x342e3a3f>;
      dram_para37 = <0x2e34392e>;
      dram_para38 = <0x312f3238>;
      dram_para39 = <0x35372f3b>;
      dram_para40 = <0xcecec2c7>;
      dram_para41 = <0xcacbcac9>;
      dram_para42 = <0xcacacbce>;
      dram_para43 = <0xbfbdcdcd>;
      dram_para44 = <0xcfc6d3d0>;
      dram_para45 = <0xc9cdd0c7>;
      dram_para46 = <0xccc9cfd3>;
      dram_para47 = <0xcfd3cad6>;
      dram_para48 = <0x00000000>;
      dram_para49 = <0x00000000>;
      dram_para50 = <0x00000000>;
      dram_para51 = <0x00000000>;
      dram_para52 = <0x00000000>;
      dram_para53 = <0x00000000>;
      dram_para54 = <0x00000000>;
      dram_para55 = <0x00000000>;
      dram_para56 = <0x00000000>;
      dram_para57 = <0x00000000>;
      dram_para58 = <0x00000000>;
      dram_para59 = <0x00000000>;
      dram_para60 = <0x00000000>;
      dram_para61 = <0x00000000>;
      dram_para62 = <0x00000000>;
      dram_para63 = <0x00000000>;
      dram_para64 = <0x00000000>;
      dram_para65 = <0x00000000>;
      dram_para66 = <0x00000000>;
      dram_para67 = <0x00000000>;
      dram_para68 = <0x00000000>;
      dram_para69 = <0x00000000>;
      dram_para70 = <0x00000000>;
      dram_para71 = <0x00000000>;
      dram_para72 = <0x00000000>;
      dram_para73 = <0x00000000>;
      dram_para74 = <0x00000000>;
      dram_para75 = <0x00000000>;
      dram_para76 = <0x00000000>;
      dram_para77 = <0x00000000>;
      dram_para78 = <0x00000000>;
      dram_para79 = <0x00000000>;
      dram_para80 = <0x00000000>;
      dram_para81 = <0x00000000>;
      dram_para82 = <0x00000000>;
      dram_para83 = <0x00000000>;
      dram_para84 = <0x00000000>;
      dram_para85 = <0x00000000>;
      dram_para86 = <0x00000000>;
      dram_para87 = <0x00000000>;
      dram_para88 = <0x00000000>;
      dram_para89 = <0x00000000>;
      dram_para90 = <0x00000000>;
      dram_para91 = <0x00000000>;
      dram_para92 = <0x00000000>;
      dram_para93 = <0x00000000>;
      dram_para94 = <0x00000000>;
      dram_para95 = <0x00000000>;
      compatible = "allwinner,dram";
      clocks = <0x0000001a 0x00000000>;
      clock-names = "pll_ddr";
      phandle = <0x00000111>;
      };
    clk_ddr
      {
      compatible = "allwinner,clock_ddr";
      reg = <0x00000000 0x02001000 0x00000000 0x00001000>;
      clocks = <0x0000001a 0x00000000>;
      clock-names = "pll_ddr";
      #clock-cells = <0x00000000>;
      phandle = <0x0000001b>;
      };
    opp_table
      {
      compatible = "operating-points-v2";
      phandle = <0x0000001c>;
      opp@150000000
        {
        opp-hz = <0x00000000 0x08f0d180>;
        clock-latency-ns = <0x000249f0>;
        opp-microvolt = <0x000dbba0>;
        };
      };
    dmcfreq@3120000
      {
      compatible = "allwinner,sun55iw3-dmc", "syscon";
      reg = <0x00000000 0x03120000 0x00000000 0x00011000 0x00000000 0x02020000 0x00000000 0x00004000>;
      interrupts = <0x00000000 0x00000079 0x00000004>;
      clocks = <0x0000001b 0x0000001a 0x00000032>;
      clock-names = "dram", "bus";
      operating-points-v2 = <0x0000001c>;
      upthreshold = <0x0000003c>;
      downdifferential = <0x00000014>;
      vddcore-supply = <0x0000001d>;
      normalvoltage = <0x000dbba0>;
      boostvoltage = <0x000dbba0>;
      phandle = <0x00000112>;
      };
    soc@3000000
      {
      compatible = "simple-bus";
      #address-cells = <0x00000002>;
      #size-cells = <0x00000002>;
      ranges;
      phandle = <0x00000113>;
      rt-media@1c0e000
        {
        compatible = "allwinner,rt-media";
        };
      ve@1c0e000
        {
        compatible = "allwinner,sunxi-cedar-ve";
        reg = <0x00000000 0x01c0e000 0x00000000 0x00001000 0x00000000 0x03000000 0x00000000 0x00000010>;
        interrupts = <0x00000000 0x00000078 0x00000004>;
        clocks = <0x0000001a 0x00000040 0x0000001a 0x0000003f 0x0000001a 0x00000058>;
        clock-names = "bus_ve", "ve", "mbus_ve";
        resets = <0x0000001a 0x00000008>;
        reset-names = "reset_ve";
        iommus = <0x0000001e 0x00000002 0x00000001>;
        power-domains = <0x0000001f 0x00000000>;
        ve-supply = <0x00000020>;
        phandle = <0x00000114>;
        };
      ve1@1c0e000
        {
        compatible = "allwinner,sunxi-cedar-ve";
        iommus = <0x0000001e 0x00000003 0x00000001>;
        phandle = <0x00000115>;
        };
      pd-ve-test@0
        {
        compatible = "allwinner,sunxi-power-domain-test";
        reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
        power-domains = <0x0000001f 0x00000000>;
        status = "okay";
        phandle = <0x00000116>;
        };
      pd-vi-test@0
        {
        compatible = "allwinner,sunxi-power-domain-test";
        reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
        power-domains = <0x0000001f 0x00000002>;
        status = "okay";
        phandle = <0x00000117>;
        };
      pd-vo0-test@0
        {
        compatible = "allwinner,sunxi-power-domain-test";
        reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
        power-domains = <0x0000001f 0x00000003>;
        status = "okay";
        phandle = <0x00000118>;
        };
      pd-vo1-test@0
        {
        compatible = "allwinner,sunxi-power-domain-test";
        reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
        power-domains = <0x0000001f 0x00000004>;
        status = "okay";
        phandle = <0x00000119>;
        };
      pd-de-test@0
        {
        compatible = "allwinner,sunxi-power-domain-test";
        reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
        power-domains = <0x0000001f 0x00000005>;
        status = "okay";
        phandle = <0x0000011a>;
        };
      pd-nand-test@0
        {
        compatible = "allwinner,sunxi-power-domain-test";
        reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
        power-domains = <0x0000001f 0x00000006>;
        status = "okay";
        phandle = <0x0000011b>;
        };
      pd-pcie-test@0
        {
        compatible = "allwinner,sunxi-power-domain-test";
        reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
        power-domains = <0x0000001f 0x00000007>;
        status = "okay";
        phandle = <0x0000011c>;
        };
      pd-dsp-test@0
        {
        compatible = "allwinner,sunxi-power-domain-test";
        reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
        power-domains = <0x00000021 0x00000000>;
        status = "okay";
        phandle = <0x0000011d>;
        };
      pd-npu-test@0
        {
        compatible = "allwinner,sunxi-power-domain-test";
        reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
        power-domains = <0x00000021 0x00000001>;
        status = "okay";
        phandle = <0x0000011e>;
        };
      pd-sram-test@0
        {
        compatible = "allwinner,sunxi-power-domain-test";
        reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
        power-domains = <0x00000021 0x00000003>;
        status = "okay";
        phandle = <0x0000011f>;
        };
      pd-riscv-test@0
        {
        compatible = "allwinner,sunxi-power-domain-test";
        reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
        power-domains = <0x00000021 0x00000004>;
        status = "okay";
        phandle = <0x00000120>;
        };
      test_ccu@3000090
        {
        compatible = "allwinner,sun55iw3-test-ccu";
        device_type = "ccu-test";
        resets = <0x0000001a 0x00000017 0x0000001a 0x00000018>;
        reset-names = "rst-uart7", "rst-uart6";
        reg = <0x00000000 0x03000090 0x00000000 0x00000008>;
        #clock-cells = <0x00000001>;
        phandle = <0x00000121>;
        };
      rtc_ccu@7090000
        {
        compatible = "allwinner,sun55iw3-rtc-ccu";
        reg = <0x00000000 0x07090000 0x00000000 0x00000400>;
        #clock-cells = <0x00000001>;
        #reset-cells = <0x00000001>;
        phandle = <0x00000023>;
        };
      clock@8817000
        {
        compatible = "allwinner,sun55iw3-cpupll";
        reg = <0x00000000 0x08817000 0x00000000 0x00004000>;
        #clock-cells = <0x00000001>;
        #reset-cells = <0x00000001>;
        pll_step = <0x00000009>;
        pll_ssc_scale = <0x0000000a>;
        pll_ssc = <0x00000001>;
        phandle = <0x00000004>;
        };
      ccu@2001000
        {
        compatible = "allwinner,sun55iw3-ccu";
        reg = <0x00000000 0x02001000 0x00000000 0x00001000>;
        clocks = <0x00000022 0x00000023 0x00000004 0x00000024>;
        clock-names = "hosc", "losc", "iosc";
        #clock-cells = <0x00000001>;
        #reset-cells = <0x00000001>;
        phandle = <0x0000001a>;
        };
      r_ccu@7010000
        {
        compatible = "allwinner,sun55iw3-r-ccu";
        reg = <0x00000000 0x07010000 0x00000000 0x00000230>;
        #clock-cells = <0x00000001>;
        #reset-cells = <0x00000001>;
        phandle = <0x00000019>;
        };
      mcu_ccu@7102000
        {
        compatible = "allwinner,sun55iw3-mcu-ccu";
        reg = <0x00000000 0x07102000 0x00000000 0x00000165>;
        #clock-cells = <0x00000001>;
        #reset-cells = <0x00000001>;
        phandle = <0x00000070>;
        };
      sunxi-drm
        {
        compatible = "allwinner,sunxi-drm";
        fb_base = <0x00000000>;
        status = "okay";
        phandle = <0x00000122>;
        booting-0
          {
          route = <0x00000000 0x00000001 0x00000010 0x00000001>;
          logo = <0xbbf18000 0x00000320 0x00000500 0x00000020>;
          mode
            {
            ratio = <0x00000000>;
            type = <0x00000000>;
            hskew = <0x00000000>;
            flags = <0x00000005>;
            vscan = <0x00000000>;
            vrefresh = <0x0000003e>;
            vtotal = <0x00000522>;
            htotal = <0x00000356>;
            vsync_end = <0x00000518>;
            hsync_end = <0x00000344>;
            vsync_start = <0x00000514>;
            hsync_start = <0x00000332>;
            vdisplay = <0x00000500>;
            hdisplay = <0x00000320>;
            clock = <0x00011170>;
            };
          };
        route
          {
          disp0_dsi1
            {
            status = "okay";
            };
          disp0_hdmi
            {
            status = "okay";
            };
          };
        };
      de@5000000
        {
        sunxi-iova-premap = <0x00000000 0xbbf18000 0x00000000 0x003e8000>;
        compatible = "allwinner,display-engine-v350";
        iommus = <0x0000001e 0x00000005 0x00000001>;
        power-domains = <0x0000001f 0x00000005>;
        reg = <0x00000000 0x05000000 0x00000000 0x00400000>;
        interrupts = <0x00000000 0x00000057 0x00000004>;
        clocks = <0x0000001a 0x00000034 0x0000001a 0x00000035>;
        clock-names = "clk_de", "clk_bus_de";
        resets = <0x0000001a 0x00000002>;
        reset-names = "rst_bus_de";
        assigned-clocks = <0x0000001a 0x00000034>;
        assigned-clock-parents = <0x0000001a 0x00000023>;
        assigned-clock-rates = "#-f";
        status = "okay";
        chn_cfg_mode = <0x00000003>;
        phandle = <0x00000123>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            reg = <0x00000000>;
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            phandle = <0x00000124>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000025>;
              phandle = <0x00000030>;
              };
            endpoint@1
              {
              reg = <0x00000001>;
              remote-endpoint = <0x00000026>;
              phandle = <0x00000036>;
              };
            endpoint@2
              {
              reg = <0x00000002>;
              remote-endpoint = <0x00000027>;
              phandle = <0x0000004c>;
              };
            endpoint@3
              {
              reg = <0x00000003>;
              remote-endpoint = <0x00000028>;
              phandle = <0x00000051>;
              };
            endpoint@4
              {
              reg = <0x00000004>;
              remote-endpoint = <0x00000029>;
              phandle = <0x0000003a>;
              };
            };
          port@1
            {
            reg = <0x00000001>;
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            phandle = <0x00000125>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x0000002a>;
              phandle = <0x00000031>;
              };
            endpoint@1
              {
              reg = <0x00000001>;
              remote-endpoint = <0x0000002b>;
              phandle = <0x00000037>;
              };
            endpoint@2
              {
              reg = <0x00000002>;
              remote-endpoint = <0x0000002c>;
              phandle = <0x0000004d>;
              };
            endpoint@3
              {
              reg = <0x00000003>;
              remote-endpoint = <0x0000002d>;
              phandle = <0x00000052>;
              };
            endpoint@4
              {
              reg = <0x00000004>;
              remote-endpoint = <0x0000002e>;
              phandle = <0x0000003b>;
              };
            };
          };
        };
      vo0@5500000
        {
        compatible = "allwinner,tcon-top0";
        power-domains = <0x0000001f 0x00000003>;
        reg = <0x00000000 0x05500000 0x00000000 0x00000fff>;
        clocks = <0x0000001a 0x00000095>;
        clock-names = "clk_bus_dpss_top";
        resets = <0x0000001a 0x0000003c>;
        reset-names = "rst_bus_dpss_top";
        status = "okay";
        phandle = <0x0000002f>;
        };
      vo1@5730000
        {
        compatible = "allwinner,tcon-top1";
        power-domains = <0x0000001f 0x00000004>;
        reg = <0x00000000 0x05730000 0x00000000 0x00000fff>;
        clocks = <0x0000001a 0x00000096>;
        clock-names = "clk_bus_dpss_top";
        resets = <0x0000001a 0x0000003d>;
        reset-names = "rst_bus_dpss_top";
        status = "okay";
        phandle = <0x00000039>;
        };
      tcon0@5501000
        {
        compatible = "allwinner,tcon-lcd";
        reg = <0x00000000 0x05501000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x0000005a 0x00000004>;
        clocks = <0x0000001a 0x0000009e 0x0000001a 0x000000a5>;
        clock-names = "clk_tcon", "clk_bus_tcon";
        resets = <0x0000001a 0x00000044>;
        reset-names = "rst_bus_tcon";
        top = <0x0000002f>;
        status = "disabled";
        phandle = <0x00000126>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000000>;
            phandle = <0x00000127>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000030>;
              phandle = <0x00000025>;
              };
            endpoint@1
              {
              reg = <0x00000001>;
              remote-endpoint = <0x00000031>;
              phandle = <0x0000002a>;
              };
            };
          port@1
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000001>;
            phandle = <0x00000128>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000032>;
              phandle = <0x00000040>;
              };
            endpoint@1
              {
              reg = <0x00000001>;
              remote-endpoint = <0x00000033>;
              phandle = <0x00000044>;
              };
            endpoint@2
              {
              reg = <0x00000002>;
              remote-endpoint = <0x00000034>;
              phandle = <0x00000048>;
              };
            endpoint@3
              {
              reg = <0x00000003>;
              remote-endpoint = <0x00000035>;
              phandle = <0x00000042>;
              };
            };
          };
        };
      tcon1@5502000
        {
        compatible = "allwinner,tcon-lcd";
        reg = <0x00000000 0x05502000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x0000005c 0x00000004>;
        clocks = <0x0000001a 0x0000009f 0x0000001a 0x000000a4>;
        clock-names = "clk_tcon", "clk_bus_tcon";
        resets = <0x0000001a 0x00000043>;
        reset-names = "rst_bus_tcon";
        top = <0x0000002f>;
        status = "okay";
        phandle = <0x00000129>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            reg = <0x00000000>;
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            phandle = <0x0000012a>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000036>;
              phandle = <0x00000026>;
              };
            endpoint@1
              {
              reg = <0x00000001>;
              remote-endpoint = <0x00000037>;
              phandle = <0x0000002b>;
              };
            };
          port@1
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000001>;
            phandle = <0x0000012b>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000038>;
              phandle = <0x00000047>;
              };
            };
          };
        };
      tcon4@5731000
        {
        compatible = "allwinner,tcon-lcd";
        reg = <0x00000000 0x05731000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x00000061 0x00000004>;
        clocks = <0x0000001a 0x000000a0 0x0000001a 0x000000a3>;
        clock-names = "clk_tcon", "clk_bus_tcon";
        resets = <0x0000001a 0x00000042>;
        reset-names = "rst_bus_tcon";
        top = <0x00000039>;
        status = "disabled";
        phandle = <0x0000012c>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000000>;
            phandle = <0x0000012d>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x0000003a>;
              phandle = <0x00000029>;
              };
            endpoint@1
              {
              reg = <0x00000001>;
              remote-endpoint = <0x0000003b>;
              phandle = <0x0000002e>;
              };
            };
          port@1
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000001>;
            phandle = <0x0000012e>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x0000003c>;
              phandle = <0x00000041>;
              };
            endpoint@1
              {
              reg = <0x00000001>;
              remote-endpoint = <0x0000003d>;
              phandle = <0x00000043>;
              };
            };
          };
        };
      lvds0@0001000
        {
        compatible = "allwinner,lvds0";
        resets = <0x0000001a 0x00000048>;
        reset-names = "rst_bus_lvds";
        phys = <0x0000003e 0x0000003f>;
        phy-names = "combophy0", "combophy1";
        status = "disabled";
        phandle = <0x0000012f>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000000>;
            phandle = <0x00000130>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000040>;
              phandle = <0x00000032>;
              };
            };
          };
        };
      lvds1@0001000
        {
        compatible = "allwinner,lvds1";
        reg = <0x00000000>;
        resets = <0x0000001a 0x00000047>;
        reset-names = "rst_bus_lvds";
        status = "disabled";
        phandle = <0x00000131>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000000>;
            phandle = <0x00000132>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000041>;
              phandle = <0x0000003c>;
              };
            };
          };
        };
      rgb0@0001000
        {
        compatible = "allwinner,rgb0";
        reg = <0x00000000>;
        status = "disabled";
        phandle = <0x00000133>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000000>;
            phandle = <0x00000134>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000042>;
              phandle = <0x00000035>;
              };
            };
          };
        };
      rgb1@0001000
        {
        compatible = "allwinner,rgb1";
        reg = <0x00000000>;
        status = "disabled";
        phandle = <0x00000135>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000000>;
            phandle = <0x00000136>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000043>;
              phandle = <0x0000003d>;
              };
            };
          };
        };
      phy@5507000
        {
        compatible = "allwinner,sunxi-dsi-combo-phy0";
        reg = <0x00000000 0x05507000 0x00000000 0x000001ff>;
        clocks = <0x0000001a 0x0000009d>;
        clock-names = "phy_gating_clk";
        resets = <0x0000001a 0x00000041>;
        reset-names = "phy_rst_clk";
        #clock-cells = <0x00000001>;
        #phy-cells = <0x00000000>;
        status = "disabled";
        phandle = <0x0000003e>;
        };
      dsi0@5506000
        {
        compatible = "allwinner,dsi0";
        reg = <0x00000000 0x05506000 0x00000000 0x00000fff>;
        interrupts = <0x00000000 0x0000005e 0x00000004>;
        clocks = <0x0000001a 0x0000009a 0x0000001a 0x0000009d 0x0000003e 0x00000002 0x0000003e 0x00000001>;
        clock-names = "dsi_clk", "dsi_gating_clk", "displl_hs", "displl_ls";
        resets = <0x0000001a 0x00000041>;
        reset-names = "dsi_rst_clk";
        assigned-clocks = <0x0000001a 0x0000009a>;
        assigned-clock-parents = <0x0000001a 0x0000000c>;
        phys = <0x0000003e>;
        phy-names = "combophy";
        status = "disabled";
        phandle = <0x00000137>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000000>;
            phandle = <0x00000138>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000044>;
              phandle = <0x00000033>;
              };
            };
          };
        };
      phy@5509000
        {
        compatible = "allwinner,sunxi-dsi-combo-phy1";
        reg = <0x00000000 0x05509000 0x00000000 0x000001ff>;
        clocks = <0x0000001a 0x0000009c>;
        clock-names = "phy_gating_clk";
        resets = <0x0000001a 0x00000040>;
        reset-names = "phy_rst_clk";
        #clock-cells = <0x00000001>;
        #phy-cells = <0x00000000>;
        status = "okay";
        phandle = <0x0000003f>;
        };
      dsi1@5508000
        {
        compatible = "allwinner,dsi1";
        reg = <0x00000000 0x05508000 0x00000000 0x00000fff>;
        interrupts = <0x00000000 0x0000005f 0x00000004>;
        clocks = <0x0000001a 0x0000009b 0x0000001a 0x0000009c 0x0000003f 0x00000002 0x0000003f 0x00000001>;
        clock-names = "dsi_clk", "dsi_gating_clk", "displl_hs", "displl_ls";
        resets = <0x0000001a 0x00000040>;
        reset-names = "dsi_rst_clk";
        assigned-clocks = <0x0000001a 0x0000009b>;
        assigned-clock-parents = <0x0000001a 0x0000000c>;
        phys = <0x0000003f>;
        phy-names = "combophy";
        status = "okay";
        pinctrl-0 = <0x00000045>;
        pinctrl-1 = <0x00000046>;
        pinctrl-names = "active", "sleep";
        phandle = <0x00000139>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            reg = <0x00000000>;
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            phandle = <0x0000013a>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000047>;
              phandle = <0x00000038>;
              };
            endpoint@1
              {
              reg = <0x00000001>;
              remote-endpoint = <0x00000048>;
              phandle = <0x00000034>;
              };
            };
          port@1
            {
            phandle = <0x0000013b>;
            endpoint
              {
              remote-endpoint = <0x00000049>;
              phandle = <0x0000004a>;
              };
            };
          };
        panel@0
          {
          panel-out-reg = <0x00000000>;
          compatible = "allwinner,virtual-panel";
          status = "okay";
          reg = <0x00000000>;
          phandle = <0x0000013c>;
          ports
            {
            port@0
              {
              reg = <0x00000000>;
              phandle = <0x0000013d>;
              endpoint@0
                {
                reg = <0x00000000>;
                remote-endpoint = <0x0000004a>;
                phandle = <0x00000049>;
                };
              };
            port@1
              {
              reg = <0x00000001>;
              phandle = <0x0000013e>;
              endpoint@0
                {
                reg = <0x00000000>;
                remote-endpoint = <0x0000004b>;
                phandle = <0x000000fd>;
                };
              };
            };
          };
        };
      tcon2@5503000
        {
        compatible = "allwinner,tcon-tv";
        reg = <0x00000000 0x05503000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x0000005b 0x00000004>;
        clocks = <0x0000001a 0x000000a6 0x0000001a 0x000000a9>;
        clock-names = "clk_tcon", "clk_bus_tcon";
        resets = <0x0000001a 0x00000046>;
        reset-names = "rst_bus_tcon";
        top = <0x0000002f>;
        status = "okay";
        phandle = <0x0000013f>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000000>;
            phandle = <0x00000140>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x0000004c>;
              phandle = <0x00000027>;
              };
            endpoint@1
              {
              reg = <0x00000001>;
              remote-endpoint = <0x0000004d>;
              phandle = <0x0000002c>;
              };
            };
          port@1
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000001>;
            phandle = <0x00000141>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x0000004e>;
              phandle = <0x00000050>;
              };
            };
          };
        };
      hdmi@5520000
        {
        compatible = "allwinner,sunxi-hdmi";
        reg = <0x00000000 0x05520000 0x00000000 0x00100000>;
        interrupts = <0x00000000 0x0000005d 0x00000004>;
        clocks = <0x0000001a 0x00000099 0x0000001a 0x00000097 0x0000001a 0x00000098 0x0000001a 0x000000a6>;
        clock-names = "clk_hdmi", "clk_hdmi_24m", "clk_cec", "clk_tcon_tv";
        resets = <0x0000001a 0x0000003e 0x0000001a 0x0000003f>;
        reset-names = "rst_bus_sub", "rst_bus_main";
        assigned-clocks = <0x0000001a 0x00000099>;
        assigned-clock-rates = <0x00000000 0x00000000>;
        power-domains = <0x0000001f 0x00000003>;
        status = "okay";
        hdmi_used = <0x00000001>;
        cldo1-supply = <0x0000004f>;
        hdmi_power0 = "cldo1";
        hdmi_power_cnt = <0x00000001>;
        hdmi_hdcp_enable = <0x00000001>;
        hdmi_hdcp22_enable = <0x00000000>;
        hdmi_cts_compatibility = <0x00000000>;
        hdmi_cec_support = <0x00000001>;
        hdmi_cec_super_standby = <0x00000001>;
        hdmi_skip_bootedid = <0x00000001>;
        ddc_en_io_ctrl = <0x00000000>;
        power_io_ctrl = <0x00000000>;
        inno_phy = * 0xbbe1b478 [0x00000048];
        phandle = <0x000000e6>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000000>;
            phandle = <0x00000142>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000050>;
              phandle = <0x0000004e>;
              };
            };
          };
        };
      tcon3@5504000
        {
        compatible = "allwinner,tcon-tv";
        reg = <0x00000000 0x05504000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x00000060 0x00000004>;
        clocks = <0x0000001a 0x000000a7 0x0000001a 0x000000a8>;
        clock-names = "clk_tcon", "clk_bus_tcon";
        assigned-clocks = <0x0000001a 0x000000a7>;
        assigned-clock-parents = <0x0000001a 0x0000001d>;
        resets = <0x0000001a 0x00000045>;
        reset-names = "rst_bus_tcon";
        top = <0x0000002f>;
        status = "disabled";
        phandle = <0x00000143>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            reg = <0x00000000>;
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            phandle = <0x00000144>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000051>;
              phandle = <0x00000028>;
              };
            endpoint@1
              {
              reg = <0x00000001>;
              remote-endpoint = <0x00000052>;
              phandle = <0x0000002d>;
              };
            };
          port@1
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000001>;
            phandle = <0x00000145>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000053>;
              phandle = <0x00000054>;
              };
            };
          };
        };
      drm_edp@5720000
        {
        compatible = "allwinner,drm-edp";
        reg = <0x00000000 0x05720000 0x00000000 0x00004000>;
        interrupts = <0x00000000 0x00000090 0x00000004>;
        power-domains = <0x0000001f 0x00000003>;
        clocks = <0x0000001a 0x000000ab 0x0000001a 0x000000aa 0x0000001a 0x00000097>;
        clock-names = "clk_bus_edp", "clk_edp", "clk_24m_edp";
        resets = <0x0000001a 0x00000049>;
        reset-names = "rst_bus_edp";
        assigned-clocks = <0x0000001a 0x000000aa>;
        assigned-clock-parents = <0x0000001a 0x0000001d>;
        status = "disabled";
        phandle = <0x00000146>;
        ports
          {
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          port@0
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000000>;
            phandle = <0x00000147>;
            endpoint@0
              {
              reg = <0x00000000>;
              remote-endpoint = <0x00000054>;
              phandle = <0x00000053>;
              };
            };
          port@1
            {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000001>;
            phandle = <0x00000148>;
            };
          };
        };
      disp@5000000
        {
        compatible = "allwinner,sunxi-disp";
        reg = * 0xbbe1bb14 [0x00000090];
        interrupts = * 0xbbe1bbb0 [0x00000060];
        clocks = * 0xbbe1bc1c [0x000000c8];
        clock-names = "clk_de0", "clk_de1", "clk_bus_de0", "clk_bus_de1", "clk_tcon0", "clk_tcon1", "clk_tcon2", "clk_tcon3", "clk_tcon4", "clk_bus_tcon0", "clk_bus_tcon1", "clk_bus_tcon2", "clk_bus_tcon3", "clk_bus_tcon4", "clk_bus_dpss_top0", "clk_bus_dpss_top1", "clk_bus_dpss_top2", "clk_bus_dpss_top3", "clk_bus_dpss_top4", "clk_mipi_dsi0", "clk_mipi_dsi1", "clk_bus_mipi_dsi0", "clk_bus_mipi_dsi1", "clk_mipi_dsi_combphy0", "clk_mipi_dsi_combphy1";
        resets = * 0xbbe1be64 [0x00000080];
        reset-names = "rst_bus_de0", "rst_bus_de1", "rst_bus_tcon0", "rst_bus_tcon1", "rst_bus_tcon2", "rst_bus_tcon3", "rst_bus_tcon4", "rst_bus_lvds0", "rst_bus_lvds1", "rst_bus_dpss_top0", "rst_bus_dpss_top1", "rst_bus_dpss_top2", "rst_bus_dpss_top3", "rst_bus_dpss_top4", "rst_bus_mipi_dsi0", "rst_bus_mipi_dsi1";
        assigned-clocks = * 0xbbe1bff4 [0x00000058];
        assigned-clock-parents = * 0xbbe1c058 [0x00000058];
        assigned-clock-rates = "#-f";
        iommus = <0x0000001e 0x00000005 0x00000000>;
        power-domains = <0x0000001f 0x00000005 0x0000001f 0x00000003>;
        power-domain-names = "pd_de", "pd_vo0";
        status = "okay";
        boot_disp = <0x00000000>;
        fb_base = <0x00000000>;
        phandle = <0x00000149>;
        };
      edp0@5720000
        {
        compatible = "allwinner,sunxi-edp0";
        reg = <0x00000000 0x05720000 0x00000000 0x00004000>;
        interrupts = <0x00000000 0x00000090 0x00000004>;
        clocks = <0x0000001a 0x000000ab 0x0000001a 0x000000aa 0x0000001a 0x00000097>;
        clock-names = "clk_bus_edp", "clk_edp", "edp_clk_24m";
        resets = <0x0000001a 0x00000049>;
        reset-names = "rst_bus_edp";
        assigned-clocks = <0x0000001a 0x000000aa>;
        assigned-clock-parents = <0x0000001a 0x0000001d>;
        status = "disabled";
        phandle = <0x0000014a>;
        };
      lcd0@1c0c000
        {
        compatible = "allwinner,sunxi-lcd0";
        reg = <0x00000000 0x01c0c000 0x00000000 0x00000000>;
        pinctrl-names = "active", "sleep";
        phandle = <0x0000014b>;
        };
      lcd1@1c0c000
        {
        compatible = "allwinner,sunxi-lcd1";
        reg = <0x00000000 0x01c0c000 0x00000000 0x00000000>;
        pinctrl-names = "active", "sleep";
        phandle = <0x0000014c>;
        };
      lcd2@1c0c000
        {
        compatible = "allwinner,sunxi-lcd2";
        reg = <0x00000000 0x01c0c000 0x00000000 0x00000000>;
        pinctrl-names = "active", "sleep";
        phandle = <0x0000014d>;
        };
      pinctrl@7022000
        {
        #address-cells = <0x00000001>;
        compatible = "allwinner,sun55iw3-r-pinctrl";
        reg = <0x00000000 0x07022000 0x00000000 0x00000800 0x00000000 0x07010374 0x00000000 0x00000004 0x00000000 0x07010378 0x00000000 0x00000004>;
        reg-names = "r-pio", "i2s0", "dmic";
        interrupts = <0x00000000 0x0000009f 0x00000004 0x00000000 0x000000a1 0x00000004>;
        clocks = <0x0000001a 0x00000002 0x00000022 0x00000023 0x00000004>;
        clock-names = "apb", "hosc", "losc";
        gpio-controller;
        #gpio-cells = <0x00000003>;
        interrupt-controller;
        #interrupt-cells = <0x00000003>;
        gpio-line-names = * 0xbbe1c56c [0x0000006c];
        phandle = <0x0000005a>;
        uart8_pins@0
          {
          pins = "pl2", "pl3";
          function = "s_uart0";
          phandle = <0x0000006c>;
          };
        uart8_pins@1
          {
          pins = "pl2", "pl3";
          function = "gpio_in";
          phandle = <0x0000006d>;
          };
        uart9_pins@0
          {
          pins = "pm0", "pm1";
          function = "s_uart1";
          phandle = <0x0000006e>;
          };
        uart9_pins@1
          {
          pins = "pm0", "pm1";
          function = "gpio_in";
          phandle = <0x0000006f>;
          };
        s_twi0@0
          {
          pins = "pl0", "pl1";
          function = "s_twi0";
          drive-strength = <0x0000000a>;
          bias-pull-up;
          phandle = <0x0000009f>;
          };
        s_twi0@1
          {
          pins = "pl0", "pl1";
          function = "gpio_in";
          phandle = <0x000000a0>;
          };
        s_irrx@0
          {
          pins = "pl11";
          function = "s_cir";
          phandle = <0x00000095>;
          };
        s_irrx@1
          {
          pins = "pl11";
          function = "gpio_in";
          phandle = <0x00000096>;
          };
        };
      g2d@5440000
        {
        compatible = "allwinner,sunxi-g2d";
        reg = <0x00000000 0x05440000 0x00000000 0x00030000>;
        interrupts = <0x00000000 0x0000008f 0x00000004>;
        clocks = <0x0000001a 0x00000039 0x0000001a 0x00000038>;
        clock-names = "bus", "g2d";
        resets = <0x0000001a 0x00000004>;
        iommus = <0x0000001e 0x00000004 0x00000001>;
        power-domains = <0x0000001f 0x00000003>;
        power-domain-names = "pd1_vo0";
        assigned-clocks = <0x0000001a 0x00000038>;
        assigned-clock-rates = <0x11e1a300>;
        phandle = <0x0000014e>;
        };
      pinctrl@2000000
        {
        #address-cells = <0x00000001>;
        compatible = "allwinner,sun55iw3-pinctrl";
        reg = <0x00000000 0x02000000 0x00000000 0x00000800 0x00000000 0x07010374 0x00000000 0x00000004 0x00000000 0x07010378 0x00000000 0x00000004>;
        reg-names = "pio", "i2s0", "dmic";
        interrupts = * 0xbbe1ca48 [0x00000078];
        clocks = <0x0000001a 0x00000030 0x00000022 0x00000023 0x00000004>;
        clock-names = "apb", "hosc", "losc";
        gpio-controller;
        #gpio-cells = <0x00000003>;
        interrupt-controller;
        #interrupt-cells = <0x00000003>;
        vcc-pg-supply = <0x00000055>;
        vcc-pc-supply = <0x00000055>;
        vcc-pf-supply = <0x00000055>;
        vcc-pfo-supply = <0x00000056>;
        gpio-line-names = * 0xbbe1cb80 [0x0000020e];
        phandle = <0x00000059>;
        sdc0@0
          {
          pins = "pf0", "pf1", "pf2", "pf3", "pf4", "pf5";
          function = "sdc0";
          drive-strength = <0x00000028>;
          bias-pull-up;
          power-source = <0x00000ce4>;
          phandle = <0x000000be>;
          };
        sdc0@1
          {
          pins = "pf0", "pf1", "pf2", "pf3", "pf4", "pf5";
          function = "sdc0";
          drive-strength = <0x00000028>;
          bias-pull-up;
          power-source = <0x00000708>;
          phandle = <0x000000bf>;
          };
        sdc0@2
          {
          pins = "pf0", "pf1", "pf2", "pf3", "pf4", "pf5";
          function = "gpio_in";
          power-source = <0x00000ce4>;
          phandle = <0x000000c0>;
          };
        sdc0@3
          {
          pins = "pf2", "pf4";
          function = "uart0";
          drive-strength = <0x0000000a>;
          bias-pull-up;
          power-source = <0x00000ce4>;
          phandle = <0x000000c1>;
          };
        sdc0@4
          {
          pins = "pf0", "pf1", "pf3", "pf5";
          function = "jtag";
          drive-strength = <0x0000000a>;
          bias-pull-up;
          power-source = <0x00000ce4>;
          phandle = <0x000000c2>;
          };
        sdc1@0
          {
          pins = "pg1", "pg2", "pg3", "pg4", "pg5";
          function = "sdc1";
          drive-strength = <0x00000014>;
          bias-pull-up;
          phandle = <0x000000c3>;
          };
        sdc1@1
          {
          pins = "pg0", "pg1", "pg2", "pg3", "pg4", "pg5";
          function = "gpio_in";
          phandle = <0x000000c5>;
          };
        sdc1@2
          {
          pins = "pg0";
          function = "sdc1";
          drive-strength = <0x0000001e>;
          bias-pull-up;
          phandle = <0x000000c4>;
          };
        sdc2@0
          {
          pins = "pc1", "pc5", "pc6", "pc8", "pc9", "pc10", "pc11", "pc13", "pc14", "pc15", "pc16";
          function = "sdc2";
          drive-strength = <0x00000028>;
          bias-pull-up;
          phandle = <0x000000bb>;
          };
        sdc2@1
          {
          pins = "pc0", "pc1", "pc5", "pc6", "pc8", "pc9", "pc10", "pc11", "pc13", "pc14", "pc15", "pc16";
          function = "gpio_in";
          phandle = <0x000000bd>;
          };
        sdc2@2
          {
          pins = "pc0";
          function = "sdc2";
          drive-strength = <0x00000028>;
          bias-pull-down;
          phandle = <0x000000bc>;
          };
        uart1@0
          {
          pins = "pg6", "pg7", "pg8", "pg9";
          function = "uart1";
          drive-strength = <0x0000000a>;
          bias-pull-up;
          phandle = <0x0000005e>;
          };
        uart1@1
          {
          pins = "pg6", "pg7", "pg8", "pg9";
          function = "gpio_in";
          phandle = <0x0000005f>;
          };
        dsi0_4lane@0
          {
          pins = "pd0", "pd1", "pd2", "pd3", "pd4", "pd5", "pd6", "pd7", "pd8", "pd9";
          function = "dsi0";
          drive-strength = <0x0000001e>;
          bias-disable;
          phandle = <0x0000014f>;
          };
        dsi0_4lane@1
          {
          pins = "pd0", "pd1", "pd2", "pd3", "pd4", "pd5", "pd6", "pd7", "pd8", "pd9";
          function = "io_disabled";
          bias-disable;
          phandle = <0x00000150>;
          };
        dsi1_4lane@0
          {
          pins = "pd10", "pd11", "pd12", "pd13", "pd14", "pd15", "pd16", "pd17", "pd18", "pd19";
          function = "dsi1";
          drive-strength = <0x0000001e>;
          bias-disable;
          phandle = <0x00000045>;
          };
        dsi1_4lane@1
          {
          pins = "pd10", "pd11", "pd12", "pd13", "pd14", "pd15", "pd16", "pd17", "pd18", "pd19";
          function = "io_disabled";
          bias-disable;
          phandle = <0x00000046>;
          };
        rgb18@0
          {
          pins = "pd0", "pd1", "pd2", "pd3", "pd4", "pd5", "pd6", "pd7", "pd8", "pd9", "pd10", "pd11", "pd12", "pd13", "pd14", "pd15", "pd16", "pd17", "pd18", "pd19", "pd20", "pd21";
          function = "lcd0";
          drive-strength = <0x0000001e>;
          phandle = <0x00000151>;
          };
        rgb18@1
          {
          pins = "pd0", "pd1", "pd2", "pd3", "pd4", "pd5", "pd6", "pd7", "pd8", "pd9", "pd10", "pd11", "pd12", "pd13", "pd14", "pd15", "pd16", "pd17", "pd18", "pd19", "pd20", "pd21";
          function = "gpio_in";
          phandle = <0x00000152>;
          };
        lvds0@0
          {
          pins = "pd0", "pd1", "pd2", "pd3", "pd4", "pd5", "pd6", "pd7", "pd8", "pd9";
          function = "lvds0";
          drive-strength = <0x0000001e>;
          phandle = <0x00000153>;
          };
        lvds0@1
          {
          pins = "pd0", "pd1", "pd2", "pd3", "pd4", "pd5", "pd6", "pd7", "pd8", "pd9";
          function = "gpio_in";
          phandle = <0x00000154>;
          };
        lvds1@0
          {
          pins = "pd10", "pd11", "pd12", "pd13", "pd14", "pd15", "pd16", "pd17", "pd18", "pd19";
          function = "lvds1";
          drive-strength = <0x0000001e>;
          phandle = <0x00000155>;
          };
        lvds1@1
          {
          pins = "pd10", "pd11", "pd12", "pd13", "pd14", "pd15", "pd16", "pd17", "pd18", "pd19";
          function = "gpio_in";
          phandle = <0x00000156>;
          };
        lvds2@0
          {
          pins = "pj0", "pj1", "pj2", "pj3", "pj4", "pj5", "pj6", "pj7", "pj8", "pj9";
          function = "lvds2";
          drive-strength = <0x0000001e>;
          phandle = <0x00000157>;
          };
        lvds2@1
          {
          pins = "pj0", "pj1", "pj2", "pj3", "pj4", "pj5", "pj6", "pj7", "pj8", "pj9";
          function = "gpio_in";
          phandle = <0x00000158>;
          };
        lvds3@0
          {
          pins = "pj10", "pj11", "pj12", "pj13", "pj14", "pj15", "pj16", "pj17", "pj18", "pj19";
          function = "lvds3";
          drive-strength = <0x0000001e>;
          phandle = <0x00000159>;
          };
        lvds3@1
          {
          pins = "pj10", "pj11", "pj12", "pj13", "pj14", "pj15", "pj16", "pj17", "pj18", "pj19";
          function = "gpio_in";
          phandle = <0x0000015a>;
          };
        rgb1@0
          {
          pins = "pj0", "pj1", "pj2", "pj3", "pj4", "pj5", "pj6", "pj7", "pj8", "pj9", "pj10", "pj11", "pj12", "pj13", "pj14", "pj15", "pj16", "pj17", "pj18", "pj19", "pj20", "pj21", "pj22", "pj23", "pj24", "pj25", "pj26", "pj27";
          function = "lcd1";
          drive-strength = <0x0000001e>;
          phandle = <0x0000015b>;
          };
        rgb1@1
          {
          pins = "pj0", "pj1", "pj2", "pj3", "pj4", "pj5", "pj6", "pj7", "pj8", "pj9", "pj10", "pj11", "pj12", "pj13", "pj14", "pj15", "pj16", "pj17", "pj18", "pj19", "pj20", "pj21", "pj22", "pj23", "pj24", "pj25", "pj26", "pj27";
          function = "gpio_in";
          phandle = <0x0000015c>;
          };
        rgb0@0
          {
          pins = "pb0", "pb1", "pd0", "pd1", "pd2", "pd3", "pd4", "pd5", "pb2", "pb3", "pd6", "pd7", "pd8", "pd9", "pd10", "pd11", "pb7", "pb8", "pd12", "pd13", "pd14", "pd15", "pd16", "pd17", "pd18", "pd19", "pd20", "pd21";
          function = "lcd0";
          drive-strength = <0x0000001e>;
          phandle = <0x0000015d>;
          };
        rgb0@1
          {
          pins = "pb0", "pb1", "pd0", "pd1", "pd2", "pd3", "pd4", "pd5", "pb2", "pb3", "pd6", "pd7", "pd8", "pd9", "pd10", "pd11", "pb7", "pb8", "pd12", "pd13", "pd14", "pd15", "pd16", "pd17", "pd18", "pd19", "pd20", "pd21";
          function = "gpio_in";
          phandle = <0x0000015e>;
          };
        rgb0@2
          {
          pins = "pd0", "pd1", "pd2", "pd3", "pd4", "pd5", "pd6", "pd7", "pd8", "pd9", "pd10", "pd11", "pd12", "pd13", "pd14", "pd15", "pd16", "pd17", "pd18", "pd19", "pd20", "pd21";
          function = "dpss";
          drive-strength = <0x0000001e>;
          phandle = <0x0000015f>;
          };
        rgb0@3
          {
          pins = "pd0", "pd1", "pd2", "pd3", "pd4", "pd5", "pd6", "pd7", "pd8", "pd9", "pd10", "pd11", "pd12", "pd13", "pd14", "pd15", "pd16", "pd17", "pd18", "pd19", "pd20", "pd21";
          function = "gpio_in";
          phandle = <0x00000160>;
          };
        csi_mclk0@0
          {
          pins = "pe0";
          function = "mipi0";
          drive-strength = <0x00000014>;
          phandle = <0x000000c9>;
          };
        csi_mclk0@1
          {
          pins = "pe0";
          function = "gpio_in";
          phandle = <0x000000ca>;
          };
        csi_mclk1@0
          {
          pins = "pe5";
          function = "mipi1";
          drive-strength = <0x00000014>;
          phandle = <0x000000cb>;
          };
        csi_mclk1@1
          {
          pins = "pe5";
          function = "gpio_in";
          phandle = <0x000000cc>;
          };
        csi_mclk2@0
          {
          pins = "pe15";
          function = "mipi2";
          drive-strength = <0x00000014>;
          phandle = <0x000000cd>;
          };
        csi_mclk2@1
          {
          pins = "pe15";
          function = "gpio_in";
          phandle = <0x000000ce>;
          };
        csi_mclk3@0
          {
          pins = "pe10";
          function = "mipi3";
          drive-strength = <0x00000014>;
          phandle = <0x000000cf>;
          };
        csi_mclk3@1
          {
          pins = "pe10";
          function = "gpio_in";
          phandle = <0x000000d0>;
          };
        ncsi_bt656@0
          {
          pins = "pk12", "pk14", "pk15", "pk16", "pk17", "pk18", "pk19", "pk20", "pk21", "pk22", "pk23";
          function = "ncsi";
          drive-strength = <0x00000014>;
          phandle = <0x000000d1>;
          };
        ncsi_bt656@1
          {
          pins = "pk12", "pk14", "pk15", "pk16", "pk17", "pk18", "pk19", "pk20", "pk21", "pk22", "pk23";
          function = "gpio_in";
          phandle = <0x000000d2>;
          };
        ncsi_bt1120@0
          {
          pins = "pk12", "pk14", "pk15", "pk16", "pk17", "pk18", "pk19", "pk20", "pk21", "pk22", "pk23", "pe6", "pe7", "pe8", "pe9", "pe10", "pe11", "pe12", "pe15";
          function = "ncsi";
          drive-strength = <0x00000014>;
          phandle = <0x00000161>;
          };
        ncsi_bt1120@1
          {
          pins = "pk12", "pk14", "pk15", "pk16", "pk17", "pk18", "pk19", "pk20", "pk21", "pk22", "pk23", "pe6", "pe7", "pe8", "pe9", "pe10", "pe11", "pe12", "pe15";
          function = "gpio_in";
          phandle = <0x00000162>;
          };
        mipia@0
          {
          pins = "pk0", "pk1", "pk2", "pk3", "pk4", "pk5";
          function = "mcsia";
          drive-strength = <0x0000000a>;
          phandle = <0x000000d3>;
          };
        mipia@1
          {
          pins = "pk0", "pk1", "pk2", "pk3", "pk4", "pk5";
          function = "gpio_in";
          phandle = <0x000000d4>;
          };
        mipib@0
          {
          pins = "pk6", "pk7", "pk8", "pk9", "pk10", "pk11";
          function = "mcsib";
          drive-strength = <0x0000000a>;
          phandle = <0x000000d7>;
          };
        mipib@1
          {
          pins = "pk6", "pk7", "pk8", "pk9", "pk10", "pk11";
          function = "gpio_in";
          phandle = <0x000000d8>;
          };
        mipib_4lane@0
          {
          pins = "pk6", "pk7", "pk8", "pk9", "pk10", "pk11";
          function = "mcsib";
          drive-strength = <0x0000000a>;
          phandle = <0x000000d5>;
          };
        mipib_4lane@1
          {
          pins = "pk6", "pk7", "pk8", "pk9", "pk10", "pk11";
          function = "gpio_in";
          phandle = <0x000000d6>;
          };
        mipic@0
          {
          pins = "pk12", "pk13", "pk14", "pk15", "pk16", "pk17";
          function = "mcsic";
          drive-strength = <0x0000000a>;
          phandle = <0x000000d9>;
          };
        mipic@1
          {
          pins = "pk12", "pk13", "pk14", "pk15", "pk16", "pk17";
          function = "gpio_in";
          phandle = <0x000000da>;
          };
        mipid@0
          {
          pins = "pk18", "pk19", "pk20", "pk21", "pk22", "pk23";
          function = "mcsid";
          drive-strength = <0x0000000a>;
          phandle = <0x000000dd>;
          };
        mipid@1
          {
          pins = "pk18", "pk19", "pk20", "pk21", "pk22", "pk23";
          function = "gpio_in";
          phandle = <0x000000de>;
          };
        mipid_4lane@0
          {
          pins = "pk18", "pk19", "pk20", "pk21", "pk22", "pk23";
          function = "mcsid";
          drive-strength = <0x0000000a>;
          phandle = <0x000000db>;
          };
        mipid_4lane@1
          {
          pins = "pk18", "pk19", "pk20", "pk21", "pk22", "pk23";
          function = "gpio_in";
          phandle = <0x000000dc>;
          };
        test_pins@0
          {
          pins = "pb2", "pb5";
          function = "test";
          drive-strength = <0x0000000a>;
          bias-pull-up;
          phandle = <0x00000057>;
          };
        test_pins@1
          {
          pins = "pb2", "pb5";
          function = "gpio_in";
          phandle = <0x00000058>;
          };
        uart0_pins@0
          {
          pins = [00 00];
          function = "uart0";
          phandle = <0x0000005b>;
          };
        uart0_pins@1
          {
          pins = [00 00];
          function = "gpio_in";
          phandle = <0x0000005c>;
          };
        uart2_pins@0
          {
          pins = "pb0", "pb1";
          function = "uart2";
          phandle = <0x00000060>;
          };
        uart2_pins@1
          {
          pins = "pb0", "pb1";
          function = "gpio_in";
          phandle = <0x00000061>;
          };
        uart3_pins@0
          {
          pins = "pd14", "pd15";
          function = "uart3";
          phandle = <0x00000062>;
          };
        uart3_pins@1
          {
          pins = "pd14", "pd15";
          function = "gpio_in";
          phandle = <0x00000063>;
          };
        uart4_pins@0
          {
          pins = "pd18", "pd19";
          function = "uart4";
          phandle = <0x00000064>;
          };
        uart4_pins@1
          {
          pins = "pd18", "pd19";
          function = "gpio_in";
          phandle = <0x00000065>;
          };
        uart5_pins@0
          {
          pins = "pe11", "pe12";
          function = "uart5";
          phandle = <0x00000066>;
          };
        uart5_pins@1
          {
          pins = "pe11", "pe12";
          function = "gpio_in";
          phandle = <0x00000067>;
          };
        uart6_pins@0
          {
          pins = "pk18", "pk19";
          function = "uart6";
          phandle = <0x00000068>;
          };
        uart6_pins@1
          {
          pins = "pk18", "pk19";
          function = "gpio_in";
          phandle = <0x00000069>;
          };
        uart7_pins@0
          {
          pins = "pb11", "pb12";
          function = "uart7";
          phandle = <0x0000006a>;
          };
        uart7_pins@1
          {
          pins = "pb11", "pb12";
          function = "gpio_in";
          phandle = <0x0000006b>;
          };
        pwm0_1@0
          {
          pins = "pd22";
          function = "pwm0_1";
          drive-strength = <0x0000000a>;
          phandle = <0x00000082>;
          };
        pwm0_1@1
          {
          pins = "pd22";
          function = "gpio_in";
          phandle = <0x00000083>;
          };
        ledc@0
          {
          pins = "pl5";
          function = "ledc";
          drive-strength = <0x0000000a>;
          phandle = <0x00000163>;
          };
        ledc@1
          {
          pins = "pl5";
          function = "gpio_in";
          phandle = <0x00000164>;
          };
        irrx@0
          {
          pins = "ph19";
          function = "cir";
          phandle = <0x00000093>;
          };
        irrx@1
          {
          pins = "ph19";
          function = "gpio_in";
          phandle = <0x00000094>;
          };
        irtx@0
          {
          pins = "ph18";
          function = "cir";
          phandle = <0x00000097>;
          };
        irtx@1
          {
          pins = "ph18";
          function = "gpio_in";
          phandle = <0x00000098>;
          };
        twi0@0
          {
          pins = "ph0", "ph1";
          function = "twi0";
          drive-strength = <0x0000000a>;
          bias-pull-up;
          phandle = <0x00000165>;
          };
        twi0@1
          {
          pins = "ph0", "ph1";
          function = "gpio_in";
          phandle = <0x00000166>;
          };
        twi1@0
          {
          pins = "ph2", "ph3";
          function = "twi1";
          drive-strength = <0x0000000a>;
          bias-pull-up;
          phandle = <0x00000167>;
          };
        twi1@1
          {
          pins = "ph2", "ph3";
          function = "gpio_in";
          phandle = <0x00000168>;
          };
        twi4@0
          {
          pins = "pe13", "pe14";
          function = "twi4";
          drive-strength = <0x00000014>;
          bias-pull-up;
          phandle = <0x00000099>;
          };
        twi4@1
          {
          pins = "pe13", "pe14";
          function = "gpio_in";
          phandle = <0x0000009a>;
          };
        twi5@0
          {
          pins = "pj26", "pj27";
          function = "twi5";
          drive-strength = <0x0000000a>;
          bias-pull-up;
          phandle = <0x0000009b>;
          };
        twi5@1
          {
          pins = "pj26", "pj27";
          function = "gpio_in";
          phandle = <0x0000009c>;
          };
        ncsi@0
          {
          pins = "pk12", "pk14", "pk15", "pk16", "pk17", "pk18", "pk19", "pk20", "pk21", "pk22", "pk23", "pe6", "pe7", "pe8", "pe9", "pe10", "pe11", "pe12", "pe15";
          function = "ncsi";
          drive-strength = <0x00000014>;
          phandle = <0x00000169>;
          };
        ncsi@1
          {
          pins = "pk12", "pk14", "pk15", "pk16", "pk17", "pk18", "pk19", "pk20", "pk21", "pk22", "pk23", "pe6", "pe7", "pe8", "pe9", "pe10", "pe11", "pe12", "pe15";
          function = "gpio_in";
          phandle = <0x0000016a>;
          };
        i2s1@0
          {
          pins = "pg10", "pg11", "pg12";
          function = "i2s1";
          drive-strength = <0x00000014>;
          bias-disable;
          phandle = <0x0000016b>;
          };
        i2s1@1
          {
          pins = "pg10", "pg11", "pg12", "pg13", "pg14";
          function = "io_disabled";
          drive-strength = <0x00000014>;
          bias-disable;
          phandle = <0x0000016c>;
          };
        i2s1@2
          {
          pins = "pg13";
          function = "i2s1_dout";
          drive-strength = <0x00000014>;
          bias-disable;
          phandle = <0x0000016d>;
          };
        i2s1@3
          {
          pins = "pg14";
          function = "i2s1_din";
          drive-strength = <0x00000014>;
          bias-disable;
          phandle = <0x0000016e>;
          };
        owa@0
          {
          pins = "ph7";
          function = "owa";
          drive-strength = <0x00000014>;
          bias-disable;
          phandle = <0x0000016f>;
          };
        owa@1
          {
          pins = "ph7";
          function = "io_disabled";
          drive-strength = <0x00000014>;
          bias-disable;
          phandle = <0x00000170>;
          };
        spi0@0
          {
          pins = "pc2", "pc4", "pc12";
          function = "spi0";
          drive-strength = <0x0000000a>;
          phandle = <0x000000b8>;
          };
        spi0@1
          {
          pins = "pc3";
          function = "spi0";
          drive-strength = <0x0000000a>;
          bias-pull-up;
          phandle = <0x000000b9>;
          };
        spi0@2
          {
          pins = "pc2", "pc3", "pc4", "pc12";
          function = "gpio_in";
          drive-strength = <0x0000000a>;
          phandle = <0x000000ba>;
          };
        i2s0@0
          {
          pins = "pb4", "pb5", "pb6";
          function = "i2s0";
          drive-strength = <0x00000014>;
          bias-disable;
          phandle = <0x00000171>;
          };
        i2s0@1
          {
          pins = "pb4", "pb5", "pb6", "pb7", "pb8";
          function = "io_disabled";
          drive-strength = <0x00000014>;
          bias-disable;
          phandle = <0x00000172>;
          };
        i2s0@2
          {
          pins = "pb7";
          function = "i2s0_dout";
          drive-strength = <0x00000014>;
          bias-disable;
          phandle = <0x00000173>;
          };
        i2s0@3
          {
          pins = "pb8";
          function = "i2s0_din";
          drive-strength = <0x00000014>;
          bias-disable;
          phandle = <0x00000174>;
          };
        gmac0@0
          {
          pins = "ph0", "ph1", "ph2", "ph3", "ph4", "ph5", "ph6", "ph7", "ph9", "ph10", "ph13", "ph14", "ph15", "ph16", "ph17", "ph18";
          drive-strength = <0x00000028>;
          function = "gmac0";
          bias-pull-up;
          phandle = <0x000000f0>;
          };
        gmac0@1
          {
          pins = "ph0", "ph1", "ph2", "ph3", "ph4", "ph5", "ph6", "ph7", "ph9", "ph10", "ph13", "ph14", "ph15", "ph16", "ph17", "ph18";
          function = "gpio_in";
          phandle = <0x000000f1>;
          };
        gmac1@0
          {
          pins = "pj0", "pj1", "pj2", "pj3", "pj4", "pj5", "pj6", "pj7", "pj8", "pj9", "pj10", "pj11", "pj12", "pj13", "pj14", "pj15";
          drive-strength = <0x00000028>;
          function = "gmac1";
          bias-pull-up;
          phandle = <0x000000f6>;
          };
        gmac1@1
          {
          pins = "pj0", "pj1", "pj2", "pj3", "pj4", "pj5", "pj6", "pj7", "pj8", "pj9", "pj10", "pj11", "pj12", "pj13", "pj14", "pj15";
          function = "gpio_in";
          phandle = <0x000000f7>;
          };
        };
      pinctrl_test@2000000
        {
        reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
        compatible = "allwinner,sunxi-pinctrl-test";
        device_type = "pinctrl-test";
        pinctrl-0 = <0x00000057>;
        pinctrl-1 = <0x00000058>;
        pinctrl-names = "default", "sleep";
        test-gpios = <0x00000059 0x00000001 0x00000004 0x00000001>;
        suspend-gpios = <0x0000005a 0x00000000 0x00000004 0x00000001>;
        wakeup-source;
        interrupt-parent = <0x00000059>;
        interrupts = <0x00000001 0x00000006 0x00000004>;
        phandle = <0x00000175>;
        };
      ths0@200a000
        {
        compatible = "allwinner,sun55iw3p1-ths0";
        reg = <0x00000000 0x0200a000 0x00000000 0x00000400>;
        clocks = <0x0000001a 0x00000087 0x0000001a 0x00000083>;
        clock-names = "bus", "sclk";
        resets = <0x0000001a 0x0000002f>;
        #thermal-sensor-cells = <0x00000001>;
        phandle = <0x00000017>;
        };
      ths0@2009400
        {
        compatible = "allwinner,sun55iw3p1-ths1";
        reg = <0x00000000 0x02009400 0x00000000 0x00000400>;
        clocks = <0x0000001a 0x00000087 0x0000001a 0x00000084>;
        clock-names = "bus", "sclk";
        resets = <0x0000001a 0x0000002f>;
        #thermal-sensor-cells = <0x00000001>;
        phandle = <0x00000012>;
        };
      timer@3008000
        {
        compatible = "allwinner,sun50i-timer";
        device_type = "soc_timer";
        reg = <0x00000000 0x03008000 0x00000000 0x00000400>;
        interrupt-parent = <0x00000018>;
        interrupts = <0x00000000 0x00000037 0x00000004>;
        clock-names = "parent", "bus", "timer0-mod", "timer1-mod";
        clocks = <0x00000022 0x0000001a 0x00000045 0x0000001a 0x0000004b 0x0000001a 0x0000004c>;
        resets = <0x0000001a 0x0000000d>;
        phandle = <0x00000176>;
        };
      arm_pmu
        {
        compatible = "arm,armv8-pmuv3";
        interrupt-parent = <0x00000018>;
        interrupts = <0x00000001 0x00000007 0x00000004>;
        };
      dump_reg@40000
        {
        compatible = "allwinner,sunxi-dump-reg";
        reg = <0x00000000 0x00040000 0x00000000 0x00000004>;
        phandle = <0x00000177>;
        };
      soft_jtag_master@0
        {
        compatible = "allwinner,soft-jtag-master";
        tdi-gpios = <0x0000005a 0x00000000 0x00000002 0x00000000>;
        tdo-gpios = <0x0000005a 0x00000000 0x00000003 0x00000000>;
        tck-gpios = <0x00000059 0x00000001 0x0000000b 0x00000000>;
        tms-gpios = <0x00000059 0x00000001 0x0000000c 0x00000000>;
        status = "disabled";
        phandle = <0x00000178>;
        };
      pio-18
        {
        compatible = "regulator-fixed";
        regulator-name = "pio-18";
        regulator-min-microvolt = <0x001b7740>;
        regulator-max-microvolt = <0x001b7740>;
        phandle = <0x00000055>;
        };
      pio-28
        {
        compatible = "regulator-fixed";
        regulator-name = "pio-28";
        regulator-min-microvolt = <0x002ab980>;
        regulator-max-microvolt = <0x002ab980>;
        phandle = <0x00000179>;
        };
      pio-33
        {
        compatible = "regulator-fixed";
        regulator-name = "pio-33";
        regulator-min-microvolt = <0x00325aa0>;
        regulator-max-microvolt = <0x00325aa0>;
        phandle = <0x00000056>;
        };
      uart@2500000
        {
        compatible = "allwinner,sun55i-uart";
        reg = <0x00000000 0x02500000 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x00000002 0x00000004>;
        clocks = <0x0000001a 0x0000006c>;
        resets = <0x0000001a 0x0000001e>;
        uart0_port = <0x00000000>;
        uart0_type = <0x00000002>;
        status = "okay";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x0000005b>;
        pinctrl-1 = <0x0000005c>;
        uart-supply = <0x0000005d>;
        phandle = <0x0000017a>;
        };
      uart@2500400
        {
        compatible = "allwinner,sun55i-uart";
        device_type = "uart1";
        reg = <0x00000000 0x02500400 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x00000003 0x00000004>;
        sunxi,uart-fifosize = <0x00000040>;
        clocks = <0x0000001a 0x0000006b>;
        clock-names = "uart1";
        resets = <0x0000001a 0x0000001d>;
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x0000005e>;
        pinctrl-1 = <0x0000005f>;
        uart1_port = <0x00000001>;
        uart1_type = <0x00000004>;
        status = "okay";
        phandle = <0x0000017b>;
        };
      uart@2500800
        {
        compatible = "allwinner,sun55i-uart";
        reg = <0x00000000 0x02500800 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x00000004 0x00000004>;
        clocks = <0x0000001a 0x0000006a>;
        resets = <0x0000001a 0x0000001c>;
        uart2_port = <0x00000002>;
        uart2_type = <0x00000004>;
        sunxi,uart-fifosize = <0x00000080>;
        status = "disabled";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x00000060>;
        pinctrl-1 = <0x00000061>;
        phandle = <0x0000017c>;
        };
      uart@2500c00
        {
        compatible = "allwinner,sun55i-uart";
        reg = <0x00000000 0x02500c00 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x00000005 0x00000004>;
        clocks = <0x0000001a 0x00000069>;
        resets = <0x0000001a 0x0000001b>;
        uart3_port = <0x00000003>;
        uart3_type = <0x00000004>;
        sunxi,uart-fifosize = <0x00000080>;
        status = "disabled";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x00000062>;
        pinctrl-1 = <0x00000063>;
        phandle = <0x0000017d>;
        };
      uart@2501000
        {
        compatible = "allwinner,sun55i-uart";
        reg = <0x00000000 0x02501000 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x00000006 0x00000004>;
        clocks = <0x0000001a 0x00000068>;
        resets = <0x0000001a 0x0000001a>;
        uart4_port = <0x00000004>;
        uart4_type = <0x00000004>;
        sunxi,uart-fifosize = <0x00000080>;
        status = "disabled";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x00000064>;
        pinctrl-1 = <0x00000065>;
        phandle = <0x0000017e>;
        };
      uart@2501400
        {
        compatible = "allwinner,sun55i-uart";
        reg = <0x00000000 0x02501400 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x00000007 0x00000004>;
        clocks = <0x0000001a 0x00000067>;
        resets = <0x0000001a 0x00000019>;
        uart5_port = <0x00000005>;
        uart5_type = <0x00000004>;
        sunxi,uart-fifosize = <0x00000080>;
        status = "disabled";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x00000066>;
        pinctrl-1 = <0x00000067>;
        phandle = <0x0000017f>;
        };
      uart@2501800
        {
        compatible = "allwinner,sun55i-uart";
        reg = <0x00000000 0x02501800 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x00000008 0x00000004>;
        clocks = <0x0000001a 0x00000066>;
        resets = <0x0000001a 0x00000018>;
        uart6_port = <0x00000006>;
        uart6_type = <0x00000004>;
        sunxi,uart-fifosize = <0x00000080>;
        status = "disabled";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x00000068>;
        pinctrl-1 = <0x00000069>;
        phandle = <0x00000180>;
        };
      uart@2501c00
        {
        compatible = "allwinner,sun55i-uart";
        reg = <0x00000000 0x02501c00 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x00000009 0x00000004>;
        clocks = <0x0000001a 0x00000065>;
        resets = <0x0000001a 0x00000017>;
        uart7_port = <0x00000007>;
        uart7_type = <0x00000004>;
        sunxi,uart-fifosize = <0x00000080>;
        status = "disabled";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x0000006a>;
        pinctrl-1 = <0x0000006b>;
        phandle = <0x00000181>;
        };
      uart@7080000
        {
        compatible = "allwinner,sun55i-uart";
        reg = <0x00000000 0x07080000 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x000000a2 0x00000004>;
        clocks = <0x00000019 0x00000010>;
        resets = <0x00000019 0x00000007>;
        uart8_port = <0x00000008>;
        uart8_type = <0x00000002>;
        sunxi,uart-fifosize = <0x00000040>;
        status = "disabled";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x0000006c>;
        pinctrl-1 = <0x0000006d>;
        phandle = <0x00000182>;
        };
      uart@7080400
        {
        compatible = "allwinner,sun55i-uart";
        reg = <0x00000000 0x07080400 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x000000a3 0x00000004>;
        clocks = <0x00000019 0x0000000f>;
        resets = <0x00000019 0x00000006>;
        uart9_port = <0x00000009>;
        uart9_type = <0x00000002>;
        sunxi,uart-fifosize = <0x00000040>;
        status = "disabled";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x0000006e>;
        pinctrl-1 = <0x0000006f>;
        phandle = <0x00000183>;
        };
      dma-controller@3002000
        {
        compatible = "allwinner,dma-v105";
        reg = <0x00000000 0x03002000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x00000032 0x00000004>;
        clocks = <0x0000001a 0x00000042 0x0000001a 0x00000059>;
        clock-names = "bus", "mbus";
        dma-channels = <0x00000008>;
        dma-requests = <0x00000036>;
        resets = <0x0000001a 0x00000009>;
        #dma-cells = <0x00000001>;
        status = "okay";
        phandle = <0x00000092>;
        };
      dma1-controller@7121000
        {
        compatible = "allwinner,dma-v104";
        reg = <0x00000000 0x07121000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x000000c5 0x00000004>;
        clocks = <0x00000070 0x00000022 0x00000070 0x00000027 0x00000070 0x00000026>;
        clock-names = "bus", "mbus", "mcu-mbus";
        dma-channels = <0x00000008>;
        dma-requests = <0x0000000f>;
        resets = <0x00000070 0x0000000d>;
        #dma-cells = <0x00000001>;
        status = "okay";
        phandle = <0x0000009e>;
        };
      npu@7122000
        {
        npu-regulator = [30];
        compatible = "allwinner,npu";
        reg = <0x00000000 0x07122000 0x00000000 0x00001000>;
        device_type = "npu";
        dev_name = "npu";
        interrupts = <0x00000000 0x000000c7 0x00000004>;
        clocks = <0x0000001a 0x00000041 0x0000001a 0x0000002b 0x00000070 0x00000018 0x00000070 0x00000019>;
        clock-names = "clk_npu", "clk_parent", "npu-aclk", "npu-hclk";
        operating-points-v2 = <0x00000071>;
        resets = <0x00000070 0x00000009>;
        reset-names = "npu_rst";
        interrupt-names = "npu";
        npu-vf = <0x000002b8>;
        npu-setvol = <0x00000001>;
        power-domains = <0x00000021 0x00000001>;
        status = "okay";
        phandle = <0x00000184>;
        };
      npu-opp-table
        {
        compatible = "allwinner,sun55i-operating-points";
        opp-shared;
        phandle = <0x00000071>;
        opp-546
          {
          opp-hz = <0x208b4c80>;
          opp-microvolt-vf1 = <0x000e09c0>;
          opp-microvolt-vf12 = <0x000e09c0>;
          opp-microvolt-vf2 = <0x000e09c0>;
          opp-microvolt-vf21 = <0x000e09c0>;
          opp-microvolt-vf3 = <0x000e09c0>;
          opp-microvolt-vf31 = <0x000e09c0>;
          opp-microvolt-vf32 = <0x000e09c0>;
          opp-microvolt-vf4 = <0x000e09c0>;
          opp-microvolt-vf5 = <0x000e09c0>;
          opp-microvolt-vf52 = <0x000e09c0>;
          phandle = <0x00000185>;
          };
        opp-696
          {
          opp-hz = <0x297c1e00>;
          opp-microvolt-vf1 = <0x00100590>;
          opp-microvolt-vf12 = <0x00100590>;
          opp-microvolt-vf2 = <0x00100590>;
          opp-microvolt-vf21 = <0x00100590>;
          opp-microvolt-vf3 = <0x000f4240>;
          opp-microvolt-vf31 = <0x000f4240>;
          opp-microvolt-vf32 = <0x000f4240>;
          opp-microvolt-vf4 = <0x000f4240>;
          opp-microvolt-vf5 = <0x00100590>;
          opp-microvolt-vf52 = <0x00100590>;
          phandle = <0x00000186>;
          };
        };
      watchdog@2050000
        {
        compatible = "allwinner,wdt-v103";
        reg = <0x00000000 0x02050000 0x00000000 0x00000020>;
        interrupts = <0x00000000 0x0000003f 0x00000004>;
        phandle = <0x00000187>;
        };
      gpadc0@2009000
        {
        compatible = "allwinner,sunxi-gpadc";
        reg = <0x00000000 0x02009000 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x0000003d 0x00000004>;
        clocks = <0x0000001a 0x00000085>;
        clock-names = "bus";
        resets = <0x0000001a 0x0000002e>;
        status = "disabled";
        channel_num = <0x00000002>;
        channel_select = <0x00000003>;
        channel_data_select = <0x00000003>;
        channel_compare_select = <0x00000003>;
        channel_cld_select = <0x00000003>;
        channel_chd_select = <0x00000003>;
        channel0_compare_lowdata = <0x0019f0a0>;
        channel0_compare_higdata = <0x00124f80>;
        channel1_compare_lowdata = <0x000704e0>;
        channel1_compare_higdata = <0x00124f80>;
        phandle = <0x00000188>;
        };
      gpadc1@2009c00
        {
        compatible = "allwinner,sunxi-gpadc";
        reg = <0x00000000 0x02009c00 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x00000040 0x00000004>;
        clocks = <0x0000001a 0x00000086>;
        clock-names = "bus";
        resets = <0x0000001a 0x0000002d>;
        status = "disabled";
        channel_num = <0x00000002>;
        channel_select = <0x00000003>;
        channel_data_select = <0x00000003>;
        channel_compare_select = <0x00000003>;
        channel_cld_select = <0x00000003>;
        channel_chd_select = <0x00000003>;
        channel0_compare_lowdata = <0x0019f0a0>;
        channel0_compare_higdata = <0x00124f80>;
        channel1_compare_lowdata = <0x000704e0>;
        channel1_compare_higdata = <0x00124f80>;
        phandle = <0x00000189>;
        };
      dsp0_rproc@0
        {
        compatible = "allwinner,hifi4-rproc";
        clock-frequency = "#-f";
        clocks = <0x0000001a 0x00000002 0x00000070 0x00000004 0x0000001a 0x000000b5 0x00000070 0x00000017 0x00000019 0x00000000>;
        clock-names = "pll", "mcu-mod", "mod", "cfg", "ahbs";
        resets = <0x00000070 0x0000000b 0x00000070 0x00000008 0x00000070 0x0000000c>;
        reset-names = "mod-rst", "cfg-rst", "dbg-rst";
        reg = <0x00000000 0x07010364 0x00000000 0x00000004 0x00000000 0x07100000 0x00000000 0x00000040>;
        reg-names = "sram-for-cpux", "hifi4-cfg";
        firmware-name = "amp_dsp0.bin";
        power-domains = <0x00000021 0x00000000 0x00000021 0x00000003>;
        power-domain-names = "pd_dsp", "pd_sram";
        status = "disabled";
        phandle = <0x0000018a>;
        };
      e906_rproc@7130000
        {
        compatible = "allwinner,e906-rproc";
        clocks = <0x00000070 0x00000025 0x00000070 0x00000028 0x00000070 0x00000029>;
        clock-names = "pubsram", "mod", "cfg";
        resets = <0x00000070 0x0000000e 0x00000070 0x0000000f 0x00000070 0x00000011 0x00000070 0x00000010>;
        reset-names = "pubsram-rst", "mod-rst", "cfg-rst", "dbg-rst";
        firmware-name = "amp_rv0.bin";
        reg = <0x00000000 0x07130000 0x00000000 0x00001000>;
        reg-names = "e906-cfg";
        power-domains = <0x00000021 0x00000004 0x00000021 0x00000003>;
        power-domain-names = "pd_riscv", "pd_sram";
        status = "disabled";
        phandle = <0x0000018b>;
        };
      msgbox@3003000
        {
        compatible = "allwinner,sun55iw3-msgbox";
        #mbox-cells = <0x00000001>;
        reg = <0x00000000 0x03003000 0x00000000 0x00001000 0x00000000 0x07120000 0x00000000 0x00001000 0x00000000 0x07094000 0x00000000 0x00001000 0x00000000 0x07136000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x00000000 0x00000004 0x00000000 0x00000001 0x00000004 0x00000000 0x000000b5 0x00000004 0x00000000 0x000000ae 0x00000004>;
        clocks = <0x0000001a 0x00000043>;
        clock-names = "msgbox";
        resets = <0x0000001a 0x0000000b>;
        reset-names = "rst";
        local_id = <0x00000000>;
        phandle = <0x0000018c>;
        };
      hwspinlock@3005000
        {
        compatible = "allwinner,sunxi-hwspinlock";
        reg = <0x00000000 0x03005000 0x00000000 0x00001000>;
        #hwlock-cells = <0x00000001>;
        clocks = <0x0000001a 0x00000044>;
        clock-names = "clk_hwspinlock_bus";
        resets = <0x0000001a 0x0000000c>;
        reset-names = "rst";
        num-locks = <0x00000020>;
        status = "okay";
        phandle = <0x0000018d>;
        };
      pwm0@2000c00
        {
        #pwm-cells = <0x00000003>;
        compatible = "allwinner,sunxi-pwm-v201";
        reg = <0x00000000 0x02000c00 0x00000000 0x00000400>;
        clocks = <0x0000001a 0x00000048>;
        interrupts = <0x00000000 0x00000013 0x00000004>;
        resets = <0x0000001a 0x00000010>;
        pwm-number = <0x00000010>;
        pwm-base = <0x00000000>;
        sunxi-pwms = <0x00000072 0x00000073 0x00000074 0x00000075 0x00000076 0x00000077 0x00000078 0x00000079 0x0000007a 0x0000007b 0x0000007c 0x0000007d 0x0000007e 0x0000007f 0x00000080 0x00000081>;
        status = "okay";
        phandle = <0x000000f9>;
        };
      pwm0_0@2000c10
        {
        compatible = "allwinner,sunxi-pwm0";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c10 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x00000072>;
        };
      pwm0_1@2000c11
        {
        compatible = "allwinner,sunxi-pwm1";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c11 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "okay";
        pinctrl-0 = <0x00000082>;
        pinctrl-1 = <0x00000083>;
        phandle = <0x00000073>;
        };
      pwm0_2@2000c12
        {
        compatible = "allwinner,sunxi-pwm2";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c12 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x00000074>;
        };
      pwm0_3@2000c13
        {
        compatible = "allwinner,sunxi-pwm3";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c13 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x00000075>;
        };
      pwm0_4@2000c14
        {
        compatible = "allwinner,sunxi-pwm4";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c14 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x00000076>;
        };
      pwm0_5@2000c15
        {
        compatible = "allwinner,sunxi-pwm5";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c15 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x00000077>;
        };
      pwm0_6@2000c16
        {
        compatible = "allwinner,sunxi-pwm6";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c16 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x00000078>;
        };
      pwm0_7@2000c17
        {
        compatible = "allwinner,sunxi-pwm7";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c17 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x00000079>;
        };
      pwm0_8@2000c18
        {
        compatible = "allwinner,sunxi-pwm8";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c18 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x0000007a>;
        };
      pwm0_9@2000c19
        {
        compatible = "allwinner,sunxi-pwm9";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c19 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x0000007b>;
        };
      pwm0_10@2000c1a
        {
        compatible = "allwinner,sunxi-pwm10";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c1a 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x0000007c>;
        };
      pwm0_11@2000c1b
        {
        compatible = "allwinner,sunxi-pwm11";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c1b 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x0000007d>;
        };
      pwm0_12@2000c1c
        {
        compatible = "allwinner,sunxi-pwm12";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c1c 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x0000007e>;
        };
      pwm0_13@2000c1d
        {
        compatible = "allwinner,sunxi-pwm13";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c1d 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x0000007f>;
        };
      pwm0_14@2000c1e
        {
        compatible = "allwinner,sunxi-pwm14";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c1e 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x00000080>;
        };
      pwm0_15@2000c1f
        {
        compatible = "allwinner,sunxi-pwm15";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02000c1f 0x00000000 0x00000004>;
        reg_base = <0x02000c00>;
        status = "disabled";
        phandle = <0x00000081>;
        };
      pwm1@2051000
        {
        #pwm-cells = <0x00000003>;
        compatible = "allwinner,sunxi-pwm-v201";
        reg = <0x00000000 0x02051000 0x00000000 0x00000400>;
        clocks = <0x0000001a 0x00000047>;
        interrupts = <0x00000000 0x0000008e 0x00000004>;
        resets = <0x0000001a 0x0000000f>;
        pwm-number = <0x00000004>;
        pwm-base = <0x00000010>;
        sunxi-pwms = <0x00000084 0x00000085 0x00000086 0x00000087>;
        status = "disabled";
        phandle = <0x0000018e>;
        };
      pwm1_0@2051010
        {
        compatible = "allwinner,sunxi-pwm16";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02051010 0x00000000 0x00000004>;
        reg_base = <0x02051000>;
        status = "disabled";
        phandle = <0x00000084>;
        };
      pwm1_1@2051011
        {
        compatible = "allwinner,sunxi-pwm17";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02051011 0x00000000 0x00000004>;
        reg_base = <0x02051000>;
        status = "disabled";
        phandle = <0x00000085>;
        };
      pwm1_2@2051012
        {
        compatible = "allwinner,sunxi-pwm18";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02051012 0x00000000 0x00000004>;
        reg_base = <0x02051000>;
        status = "disabled";
        phandle = <0x00000086>;
        };
      pwm1_3@2051013
        {
        compatible = "allwinner,sunxi-pwm19";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x02051013 0x00000000 0x00000004>;
        reg_base = <0x02051000>;
        status = "disabled";
        phandle = <0x00000087>;
        };
      s_pwm0@7020c00
        {
        #pwm-cells = <0x00000003>;
        compatible = "allwinner,sunxi-pwm-v202";
        reg = <0x00000000 0x07020c00 0x00000000 0x00000400>;
        clocks = <0x00000019 0x00000008 0x00000019 0x00000009>;
        interrupts = <0x00000000 0x000000a8 0x00000004>;
        clock-names = "clk_pwm", "clk_bus_pwm";
        resets = <0x00000019 0x00000001>;
        pwm-number = <0x00000002>;
        pwm-base = <0x00000014>;
        sunxi-pwms = <0x00000088 0x00000089>;
        status = "disabled";
        phandle = <0x0000018f>;
        };
      s_pwm0_0@7020c10
        {
        compatible = "allwinner,sunxi-pwm20";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x07020c10 0x00000000 0x00000004>;
        reg_base = <0x07020c00>;
        status = "disabled";
        phandle = <0x00000088>;
        };
      s_pwm0_1@7020c11
        {
        compatible = "allwinner,sunxi-pwm21";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x07020c11 0x00000000 0x00000004>;
        reg_base = <0x07020c00>;
        status = "disabled";
        phandle = <0x00000089>;
        };
      mcu_pwm0@7103000
        {
        #pwm-cells = <0x00000003>;
        compatible = "allwinner,sunxi-pwm-v202";
        reg = <0x00000000 0x07103000 0x00000000 0x00000400>;
        clocks = <0x00000070 0x0000002b 0x00000070 0x0000002c>;
        interrupts = <0x00000000 0x000000cf 0x00000004>;
        clock-names = "clk_pwm", "clk_bus_pwm";
        resets = <0x00000070 0x00000013>;
        pwm-number = <0x00000008>;
        pwm-base = <0x00000016>;
        sunxi-pwms = <0x0000008a 0x0000008b 0x0000008c 0x0000008d 0x0000008e 0x0000008f 0x00000090 0x00000091>;
        status = "disabled";
        phandle = <0x00000190>;
        };
      mcu_pwm0_0@7103010
        {
        compatible = "allwinner,sunxi-pwm22";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x07103010 0x00000000 0x00000004>;
        reg_base = <0x07103000>;
        status = "disabled";
        phandle = <0x0000008a>;
        };
      mcu_pwm0_1@7103020
        {
        compatible = "allwinner,sunxi-pwm23";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x07103020 0x00000000 0x00000004>;
        reg_base = <0x07103000>;
        status = "disabled";
        phandle = <0x0000008b>;
        };
      mcu_pwm0_2@7103030
        {
        compatible = "allwinner,sunxi-pwm24";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x07103030 0x00000000 0x00000004>;
        reg_base = <0x07103000>;
        status = "disabled";
        phandle = <0x0000008c>;
        };
      mcu_pwm0_3@7103040
        {
        compatible = "allwinner,sunxi-pwm25";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x07103040 0x00000000 0x00000004>;
        reg_base = <0x07103000>;
        status = "disabled";
        phandle = <0x0000008d>;
        };
      mcu_pwm0_4@7103050
        {
        compatible = "allwinner,sunxi-pwm26";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x07103050 0x00000000 0x00000004>;
        reg_base = <0x07103000>;
        status = "disabled";
        phandle = <0x0000008e>;
        };
      mcu_pwm0_5@7103060
        {
        compatible = "allwinner,sunxi-pwm27";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x07103060 0x00000000 0x00000004>;
        reg_base = <0x07103000>;
        status = "disabled";
        phandle = <0x0000008f>;
        };
      mcu_pwm0_6@7103070
        {
        compatible = "allwinner,sunxi-pwm28";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x07103070 0x00000000 0x00000004>;
        reg_base = <0x07103000>;
        status = "disabled";
        phandle = <0x00000090>;
        };
      mcu_pwm0_7@7103080
        {
        compatible = "allwinner,sunxi-pwm29";
        pinctrl-names = "active", "sleep";
        reg = <0x00000000 0x07103080 0x00000000 0x00000004>;
        reg_base = <0x07103000>;
        status = "disabled";
        phandle = <0x00000091>;
        };
      ledc@2008000
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-leds";
        reg = <0x00000000 0x02008000 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x0000001c 0x00000004>;
        clocks = <0x0000001a 0x000000ac 0x0000001a 0x000000ad>;
        clock-names = "clk_ledc", "clk_cpuapb";
        resets = <0x0000001a 0x0000004a>;
        reset-names = "ledc_reset";
        dmas = <0x00000092 0x0000002a 0x00000092 0x0000002a>;
        dma-names = "rx", "tx";
        status = "disabled";
        phandle = <0x00000191>;
        };
      irrx@2005000
        {
        compatible = "allwinner,irrx";
        reg = <0x00000000 0x02005000 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x0000001b 0x00000004>;
        clocks = <0x0000001a 0x00000080 0x00000022 0x0000001a 0x0000007f>;
        clock-names = "bus", "pclk", "mclk";
        resets = <0x0000001a 0x0000002b>;
        status = "okay";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x00000093>;
        pinctrl-1 = <0x00000094>;
        phandle = <0x00000192>;
        };
      s_irrx@7040000
        {
        compatible = "allwinner,irrx";
        reg = <0x00000000 0x07040000 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x000000a7 0x00000004>;
        clocks = <0x00000019 0x00000019 0x00000022 0x00000019 0x00000018>;
        clock-names = "bus", "pclk", "mclk";
        resets = <0x00000019 0x0000000d>;
        status = "disabled";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x00000095>;
        pinctrl-1 = <0x00000096>;
        phandle = <0x00000193>;
        };
      irtx@2003000
        {
        compatible = "allwinner,irtx";
        reg = <0x00000000 0x02003000 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x0000001a 0x00000004>;
        clocks = <0x0000001a 0x00000082 0x00000022 0x0000001a 0x00000081>;
        clock-names = "bus", "pclk", "mclk";
        resets = <0x0000001a 0x0000002c>;
        status = "disabled";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x00000097>;
        pinctrl-1 = <0x00000098>;
        phandle = <0x00000194>;
        };
      twi0@2502000
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-twi-v101";
        device_type = "twi0";
        reg = <0x00000000 0x02502000 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x0000000a 0x00000004>;
        clocks = <0x0000001a 0x00000072>;
        clock-names = "bus";
        resets = <0x0000001a 0x00000024>;
        dmas = <0x00000092 0x0000002b 0x00000092 0x0000002b>;
        dma-names = "tx", "rx";
        status = "okay";
        phandle = <0x00000195>;
        };
      twi1@2502400
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-twi-v101";
        device_type = "twi1";
        reg = <0x00000000 0x02502400 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x0000000b 0x00000004>;
        clocks = <0x0000001a 0x00000071>;
        clock-names = "bus";
        resets = <0x0000001a 0x00000023>;
        dmas = <0x00000092 0x0000002c 0x00000092 0x0000002c>;
        dma-names = "tx", "rx";
        status = "disabled";
        phandle = <0x00000196>;
        };
      twi2@2502800
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-twi-v101";
        device_type = "twi2";
        reg = <0x00000000 0x02502800 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x0000000c 0x00000004>;
        clocks = <0x0000001a 0x00000070>;
        clock-names = "bus";
        resets = <0x0000001a 0x00000022>;
        dmas = <0x00000092 0x0000002d 0x00000092 0x0000002d>;
        dma-names = "tx", "rx";
        status = "disabled";
        phandle = <0x00000197>;
        };
      twi3@2502c00
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-twi-v101";
        device_type = "twi3";
        reg = <0x00000000 0x02502c00 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x0000000d 0x00000004>;
        clocks = <0x0000001a 0x0000006f>;
        clock-names = "bus";
        resets = <0x0000001a 0x00000021>;
        dmas = <0x00000092 0x0000002e 0x00000092 0x0000002e>;
        dma-names = "tx", "rx";
        status = "disabled";
        phandle = <0x00000198>;
        };
      twi4@2503000
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-twi-v101";
        device_type = "twi4";
        reg = <0x00000000 0x02503000 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x0000000e 0x00000004>;
        clocks = <0x0000001a 0x0000006e>;
        clock-names = "bus";
        resets = <0x0000001a 0x00000020>;
        dmas = <0x00000092 0x0000002f 0x00000092 0x0000002f>;
        dma-names = "tx", "rx";
        status = "okay";
        clock-frequency = <0x00061a80>;
        pinctrl-0 = <0x00000099>;
        pinctrl-1 = <0x0000009a>;
        pinctrl-names = "default", "sleep";
        twi_drv_used = <0x00000001>;
        phandle = <0x00000199>;
        };
      twi5@2503400
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-twi-v101";
        device_type = "twi5";
        reg = <0x00000000 0x02503400 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x0000000f 0x00000004>;
        clocks = <0x0000001a 0x0000006d>;
        clock-names = "bus";
        resets = <0x0000001a 0x0000001f>;
        dmas = <0x00000092 0x00000030 0x00000092 0x00000030>;
        dma-names = "tx", "rx";
        status = "okay";
        clock-frequency = <0x00061a80>;
        pinctrl-0 = <0x0000009b>;
        pinctrl-1 = <0x0000009c>;
        pinctrl-names = "default", "sleep";
        twi_drv_used = <0x00000001>;
        no_suspend = <0x00000001>;
        phandle = <0x0000019a>;
        ctp@14
          {
          compatible = "allwinner,goodix";
          reg = <0x00000014>;
          device_type = "ctp";
          status = "okay";
          ctp_name = "gt9xxnew_ts";
          ctp_twi_id = <0x00000005>;
          ctp_twi_addr = <0x00000014>;
          ctp_screen_max_x = <0x00000320>;
          ctp_screen_max_y = <0x00000500>;
          ctp_revert_x_flag = <0x00000001>;
          ctp_revert_y_flag = <0x00000001>;
          ctp_exchange_x_y_flag = <0x00000001>;
          ctp_int_port = <0x00000059 0x00000009 0x00000014 0x00000004>;
          ctp_wakeup = <0x00000059 0x00000009 0x00000015 0x00000000>;
          ctp-supply = <0x0000009d>;
          ctp_power_ldo_vol = <0x00000ce4>;
          };
        };
      s_twi0@7081400
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-twi-v101";
        device_type = "twi6";
        reg = <0x00000000 0x07081400 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x000000a4 0x00000004>;
        clocks = <0x00000019 0x00000013>;
        clock-names = "bus";
        resets = <0x00000019 0x0000000a>;
        dmas = <0x0000009e 0x00000009 0x0000009e 0x00000009>;
        dma-names = "tx", "rx";
        status = "okay";
        clock-frequency = <0x00061a80>;
        pinctrl-0 = <0x0000009f>;
        pinctrl-1 = <0x000000a0>;
        pinctrl-names = "default", "sleep";
        twi_drv_used = <0x00000001>;
        no_suspend = <0x00000001>;
        phandle = <0x0000019b>;
        axp1530@36
          {
          compatible = "ext,axp1530";
          status = "okay";
          reg = <0x00000036>;
          wakeup-source;
          phandle = <0x0000019c>;
          regulators
            {
            dcdc1
              {
              regulator-name = "axp1530-dcdc1";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x0033e140>;
              regulator-step-delay-us = <0x00000019>;
              regulator-final-delay-us = <0x00000032>;
              regulator-always-on;
              phandle = <0x00000008>;
              };
            dcdc2
              {
              regulator-name = "axp1530-dcdc2";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x00177fa0>;
              regulator-step-delay-us = <0x00000019>;
              regulator-final-delay-us = <0x00000032>;
              regulator-ramp-delay = <0x000000c8>;
              regulator-always-on;
              phandle = <0x000000a1>;
              };
            dcdc3
              {
              regulator-name = "axp1530-dcdc3";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x001c1380>;
              regulator-step-delay-us = <0x00000019>;
              regulator-final-delay-us = <0x00000032>;
              regulator-always-on;
              phandle = <0x000000a2>;
              };
            ldo1
              {
              regulator-name = "axp1530-aldo1";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-step-delay-us = <0x00000019>;
              regulator-final-delay-us = <0x00000032>;
              phandle = <0x000000a3>;
              };
            ldo2
              {
              regulator-name = "axp1530-dldo1";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-step-delay-us = <0x00000019>;
              regulator-final-delay-us = <0x00000032>;
              phandle = <0x000000a4>;
              };
            };
          virtual-ext-dcdc1
            {
            compatible = "xpower-vregulator,ext-dcdc1";
            dcdc1-supply = <0x00000008>;
            };
          virtual-ext-dcdc2
            {
            compatible = "xpower-vregulator,ext-dcdc2";
            dcdc2-supply = <0x000000a1>;
            };
          virtual-ext-dcdc3
            {
            compatible = "xpower-vregulator,ext-dcdc3";
            dcdc3-supply = <0x000000a2>;
            };
          virtual-ext-aldo1
            {
            compatible = "xpower-vregulator,ext-aldo1";
            aldo1-supply = <0x000000a3>;
            };
          virtual-ext-dldo1
            {
            compatible = "xpower-vregulator,ext-dldo1";
            dldo1-supply = <0x000000a4>;
            };
          };
        pmu@34
          {
          compatible = "x-powers,axp2202";
          reg = <0x00000034>;
          status = "okay";
          interrupts = <0x00000000 0x00000008>;
          interrupt-parent = <0x000000a5>;
          x-powers,drive-vbus-en;
          pmu_reset = <0x00000000>;
          pmu_irq_wakeup = <0x00000001>;
          pmu_hot_shutdown = <0x00000001>;
          wakeup-source;
          phandle = <0x0000019d>;
          usb_power_supply
            {
            compatible = "x-powers,axp2202-usb-power-supply";
            status = "okay";
            pmu_usbpc_vol = <0x000011f8>;
            pmu_usbpc_cur = <0x000001f4>;
            pmu_usbad_vol = <0x00000fa0>;
            pmu_usbad_cur = <0x000009c4>;
            pmu_usb_typec_used = <0x00000001>;
            wakeup_usb_in;
            wakeup_usb_out;
            det_acin_supply = <0x000000a6>;
            pmu_acin_usbid_drv = <0x00000059 0x00000007 0x0000000c 0x00000001>;
            pmu_vbus_det_gpio = <0x00000059 0x00000007 0x0000000d 0x00000001>;
            phandle = <0x000000a7>;
            };
          gpio_power_supply
            {
            compatible = "x-powers,gpio-supply";
            status = "disabled";
            pmu_acin_det_gpio = <0x00000059 0x00000007 0x0000000e 0x00000001>;
            det_usb_supply = <0x000000a7>;
            phandle = <0x000000a6>;
            };
          powerkey@0
            {
            status = "okay";
            compatible = "x-powers,axp2101-pek";
            pmu_powkey_off_time = <0x00001770>;
            pmu_powkey_off_func = <0x00000000>;
            pmu_powkey_off_en = <0x00000001>;
            pmu_powkey_long_time = <0x000005dc>;
            pmu_powkey_on_time = <0x00000200>;
            wakeup_rising;
            wakeup_falling;
            phandle = <0x0000019e>;
            };
          regulators@0
            {
            phandle = <0x0000019f>;
            dcdc1
              {
              regulator-name = "axp2202-dcdc1";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x00177fa0>;
              regulator-ramp-delay = <0x000000fa>;
              regulator-enable-ramp-delay = <0x000003e8>;
              regulator-boot-on;
              regulator-always-on;
              phandle = <0x00000006>;
              };
            dcdc2
              {
              regulator-name = "axp2202-dcdc2";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x0033e140>;
              regulator-ramp-delay = <0x000000fa>;
              regulator-enable-ramp-delay = <0x000003e8>;
              regulator-boot-on;
              regulator-always-on;
              phandle = <0x00000020>;
              };
            dcdc3
              {
              regulator-name = "axp2202-dcdc3";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x001c1380>;
              regulator-ramp-delay = <0x000000fa>;
              regulator-enable-ramp-delay = <0x000003e8>;
              regulator-always-on;
              phandle = <0x000000a9>;
              };
            dcdc4
              {
              regulator-name = "axp2202-dcdc4";
              regulator-min-microvolt = <0x000f4240>;
              regulator-max-microvolt = <0x00387520>;
              regulator-ramp-delay = <0x000000fa>;
              regulator-enable-ramp-delay = <0x000003e8>;
              phandle = <0x000000aa>;
              };
            rtcldo
              {
              regulator-name = "axp2202-rtcldo";
              regulator-min-microvolt = <0x001b7740>;
              regulator-max-microvolt = <0x001b7740>;
              regulator-boot-on;
              regulator-always-on;
              phandle = <0x000000ab>;
              };
            aldo1
              {
              regulator-name = "axp2202-aldo1";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-enable-ramp-delay = <0x000003e8>;
              phandle = <0x000000ac>;
              };
            aldo2
              {
              regulator-name = "axp2202-aldo2";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-enable-ramp-delay = <0x000003e8>;
              phandle = <0x000000ad>;
              };
            aldo3
              {
              regulator-name = "axp2202-aldo3";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-enable-ramp-delay = <0x000003e8>;
              regulator-always-on;
              regulator-boot-on;
              phandle = <0x000000ae>;
              };
            aldo4
              {
              regulator-name = "axp2202-aldo4";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-enable-ramp-delay = <0x000003e8>;
              regulator-always-on;
              regulator-boot-on;
              phandle = <0x000000af>;
              };
            bldo1
              {
              regulator-name = "axp2202-bldo1";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-enable-ramp-delay = <0x000003e8>;
              regulator-boot-on;
              regulator-always-on;
              phandle = <0x000000b0>;
              };
            bldo2
              {
              regulator-name = "axp2202-bldo2";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-enable-ramp-delay = <0x000003e8>;
              regulator-boot-on;
              regulator-always-on;
              phandle = <0x000000b1>;
              };
            bldo3
              {
              regulator-name = "axp2202-bldo3";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-enable-ramp-delay = <0x000003e8>;
              regulator-boot-on;
              regulator-always-on;
              phandle = <0x000000b2>;
              };
            bldo4
              {
              regulator-name = "axp2202-bldo4";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-enable-ramp-delay = <0x000003e8>;
              phandle = <0x000000b3>;
              };
            cldo1
              {
              regulator-name = "axp2202-cldo1";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-enable-ramp-delay = <0x000003e8>;
              phandle = <0x0000004f>;
              };
            cldo2
              {
              regulator-name = "axp2202-cldo2";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-enable-ramp-delay = <0x000003e8>;
              phandle = <0x000000b4>;
              };
            cldo3
              {
              regulator-name = "axp2202-cldo3";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-ramp-delay = <0x000009c4>;
              regulator-enable-ramp-delay = <0x000003e8>;
              regulator-boot-on;
              regulator-always-on;
              phandle = <0x0000005d>;
              };
            cldo4
              {
              regulator-name = "axp2202-cldo4";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x003567e0>;
              regulator-enable-ramp-delay = <0x000003e8>;
              regulator-boot-on;
              regulator-always-on;
              phandle = <0x000000b5>;
              };
            cpusldo
              {
              regulator-name = "axp2202-cpusldo";
              regulator-min-microvolt = <0x0007a120>;
              regulator-max-microvolt = <0x00155cc0>;
              regulator-boot-on;
              regulator-always-on;
              phandle = <0x000000b6>;
              };
            vmid
              {
              regulator-name = "axp2202-vmid";
              regulator-enable-ramp-delay = <0x000003e8>;
              phandle = <0x000000a8>;
              };
            drivevbus
              {
              regulator-name = "axp2202-drivevbus";
              regulator-enable-ramp-delay = <0x000003e8>;
              drivevbusin-supply = <0x000000a8>;
              phandle = <0x000000b7>;
              };
            };
          virtual-dcdc1
            {
            compatible = "xpower-vregulator,dcdc1";
            dcdc1-supply = <0x00000006>;
            };
          virtual-dcdc2
            {
            compatible = "xpower-vregulator,dcdc2";
            dcdc2-supply = <0x00000020>;
            };
          virtual-dcdc3
            {
            compatible = "xpower-vregulator,dcdc3";
            dcdc3-supply = <0x000000a9>;
            };
          virtual-dcdc4
            {
            compatible = "xpower-vregulator,dcdc4";
            dcdc4-supply = <0x000000aa>;
            };
          virtual-rtcldo
            {
            compatible = "xpower-vregulator,rtcldo";
            rtcldo-supply = <0x000000ab>;
            };
          virtual-aldo1
            {
            compatible = "xpower-vregulator,aldo1";
            aldo1-supply = <0x000000ac>;
            };
          virtual-aldo2
            {
            compatible = "xpower-vregulator,aldo2";
            aldo2-supply = <0x000000ad>;
            };
          virtual-aldo3
            {
            compatible = "xpower-vregulator,aldo3";
            aldo3-supply = <0x000000ae>;
            };
          virtual-aldo4
            {
            compatible = "xpower-vregulator,aldo4";
            aldo4-supply = <0x000000af>;
            };
          virtual-bldo1
            {
            compatible = "xpower-vregulator,bldo1";
            bldo1-supply = <0x000000b0>;
            };
          virtual-bldo2
            {
            compatible = "xpower-vregulator,bldo2";
            bldo2-supply = <0x000000b1>;
            };
          virtual-bldo3
            {
            compatible = "xpower-vregulator,bldo3";
            bldo3-supply = <0x000000b2>;
            };
          virtual-bldo4
            {
            compatible = "xpower-vregulator,bldo4";
            bldo4-supply = <0x000000b3>;
            };
          virtual-cldo1
            {
            compatible = "xpower-vregulator,cldo1";
            cldo1-supply = <0x0000004f>;
            };
          virtual-cldo2
            {
            compatible = "xpower-vregulator,cldo2";
            cldo2-supply = <0x000000b4>;
            };
          virtual-cldo3
            {
            compatible = "xpower-vregulator,cldo3";
            cldo3-supply = <0x0000005d>;
            };
          virtual-cldo4
            {
            compatible = "xpower-vregulator,cldo4";
            cldo4-supply = <0x000000b5>;
            };
          virtual-cpusldo
            {
            compatible = "xpower-vregulator,cpusldo";
            cpusldo-supply = <0x000000b6>;
            };
          virtual-drivevbus
            {
            compatible = "xpower-vregulator,drivevbus";
            drivevbus-supply = <0x000000b7>;
            };
          axp_gpio@0
            {
            gpio-controller;
            #size-cells = <0x00000000>;
            #gpio-cells = <0x00000006>;
            status = "okay";
            phandle = <0x000001a0>;
            };
          };
        };
      s_twi1@7081800
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-twi-v101";
        device_type = "twi7";
        reg = <0x00000000 0x07081800 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x000000a5 0x00000004>;
        clocks = <0x00000019 0x00000012>;
        clock-names = "bus";
        resets = <0x00000019 0x00000009>;
        dmas = <0x0000009e 0x0000000a 0x0000009e 0x0000000a>;
        dma-names = "tx", "rx";
        status = "disabled";
        phandle = <0x000001a1>;
        };
      s_twi2@7081c00
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-twi-v101";
        device_type = "twi8";
        reg = <0x00000000 0x07081c00 0x00000000 0x00000400>;
        interrupts = <0x00000000 0x0000009c 0x00000004>;
        clocks = <0x00000019 0x00000011>;
        clock-names = "bus";
        resets = <0x00000019 0x00000008>;
        dmas = <0x0000009e 0x0000000e 0x0000009e 0x0000000e>;
        dma-names = "tx", "rx";
        status = "disabled";
        phandle = <0x000001a2>;
        };
      spi@4025000
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-spi-v1.3";
        device_type = "spi0";
        reg = <0x00000000 0x04025000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x00000010 0x00000004>;
        clocks = <0x0000001a 0x00000008 0x0000001a 0x00000073 0x0000001a 0x0000007a>;
        clock-names = "pll", "mod", "bus";
        resets = <0x0000001a 0x00000028>;
        dmas = <0x00000092 0x00000016 0x00000092 0x00000016>;
        dma-names = "tx", "rx";
        status = "okay";
        pinctrl-0 = <0x000000b8 0x000000b9>;
        pinctrl-1 = <0x000000ba>;
        pinctrl-names = "default", "sleep";
        clock-frequency = <0x05f5e100>;
        sunxi,spi-bus-mode = <0x00000010>;
        sunxi,spi-cs-mode = <0x00000001>;
        sunxi,spi-num-cs = <0x00000001>;
        phandle = <0x000001a3>;
        spi_board0
          {
          device_type = "spi_board0";
          compatible = "spi-nor";
          m25p,fast-read = <0x00000001>;
          reg = <0x00000000>;
          spi-max-frequency = <0x02faf080>;
          spi-tx-bus-width = <0x00000001>;
          spi-rx-bus-width = <0x00000001>;
          status = "okay";
          };
        };
      spi@4026000
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-spi-v1.4";
        device_type = "spi1";
        reg = <0x00000000 0x04026000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x00000011 0x00000004>;
        clocks = <0x0000001a 0x00000008 0x0000001a 0x00000074 0x0000001a 0x00000079>;
        clock-names = "pll", "mod", "bus";
        resets = <0x0000001a 0x00000027>;
        dmas = <0x00000092 0x00000017 0x00000092 0x00000017>;
        dma-names = "tx", "rx";
        status = "disabled";
        phandle = <0x000001a4>;
        };
      spi@4027000
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-spi-v1.3";
        device_type = "spi2";
        reg = <0x00000000 0x04027000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x00000012 0x00000004>;
        clocks = <0x0000001a 0x00000008 0x0000001a 0x00000075 0x0000001a 0x00000078>;
        clock-names = "pll", "mod", "bus";
        resets = <0x0000001a 0x00000026>;
        dmas = <0x00000092 0x00000018 0x00000092 0x00000018>;
        dma-names = "tx", "rx";
        status = "disabled";
        phandle = <0x000001a5>;
        };
      spi@7092000
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-spi-v1.3";
        device_type = "r_spi0";
        reg = <0x00000000 0x07092000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x000000ac 0x00000004>;
        clocks = <0x0000001a 0x00000008 0x00000019 0x0000000b 0x00000019 0x0000000c>;
        clock-names = "pll", "mod", "bus";
        resets = <0x00000019 0x00000003>;
        dmas = <0x0000009e 0x0000000d 0x0000009e 0x0000000d>;
        dma-names = "tx", "rx";
        status = "disabled";
        phandle = <0x000001a6>;
        };
      spif@47f0000
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sun55i-spif";
        device_type = "spif";
        reg = <0x00000000 0x047f0000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x00000014 0x00000004>;
        clocks = <0x0000001a 0x00000007 0x0000001a 0x00000076 0x0000001a 0x00000077>;
        clock-names = "pclk", "mclk", "bus";
        resets = <0x0000001a 0x00000025>;
        status = "disabled";
        phandle = <0x000001a7>;
        };
      nand0@4011000
        {
        compatible = "allwinner,sun55iw3-nand";
        device_type = "nand0";
        reg = <0x00000000 0x04011000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x00000026 0x00000004>;
        clocks = <0x0000001a 0x00000013 0x0000001a 0x0000005c 0x0000001a 0x0000005d 0x0000001a 0x0000005b 0x0000001a 0x00000056>;
        clock-names = "pll_periph", "mclk", "ecc", "bus", "mbus";
        resets = <0x0000001a 0x00000012>;
        reset-names = "rst";
        power-domains = <0x0000001f 0x00000006>;
        nand0_regulator1 = "none";
        nand0_regulator2 = "none";
        nand0_cache_level = <0x55aaaa55>;
        nand0_flush_cache_num = <0x55aaaa55>;
        nand0_capacity_level = <0x55aaaa55>;
        nand0_id_number_ctl = <0x55aaaa55>;
        nand0_print_level = <0x55aaaa55>;
        nand0_p0 = <0x55aaaa55>;
        nand0_p1 = <0x55aaaa55>;
        nand0_p2 = <0x55aaaa55>;
        nand0_p3 = <0x55aaaa55>;
        chip_code = "sun50iw10";
        status = "disabled";
        boot_crc = "disabled";
        phandle = <0x000001a8>;
        };
      lradc@2009800
        {
        compatible = "allwinner,keyboard_1350mv";
        reg = <0x00000000 0x02009800 0x00000000 0x00000100>;
        interrupts = <0x00000000 0x00000042 0x00000004>;
        clocks = <0x0000001a 0x00000093>;
        resets = <0x0000001a 0x00000038>;
        status = "okay";
        key_cnt = <0x00000002>;
        key0 = <0x00000286 0x00000073>;
        key1 = <0x00000384 0x00000072>;
        key_debounce;
        debounce_value = <0x00000096>;
        phandle = <0x000001a9>;
        };
      nsi-controller@2020000
        {
        compatible = "allwinner,sun55i-nsi";
        interrupts = <0x00000000 0x0000002b 0x00000004>;
        reg = <0x00000000 0x02020000 0x00000000 0x00010000 0x00000000 0x02071000 0x00000000 0x00000400>;
        clocks = <0x0000001a 0x00000000 0x0000001a 0x00000031>;
        clock-names = "pll", "bus";
        resets = <0x0000001a 0x00000000>;
        clock-frequency = <0x1b898f80>;
        #nsi-cells = <0x00000001>;
        phandle = <0x000001aa>;
        npu
          {
          id = <0x00000005>;
          mode = <0x00000000>;
          pri = <0x00000000>;
          select = <0x00000001>;
          };
        gmac0
          {
          id = <0x00000012>;
          mode = <0x00000000>;
          pri = <0x00000001>;
          select = <0x00000001>;
          };
        gmac1
          {
          id = <0x00000013>;
          mode = <0x00000000>;
          pri = <0x00000001>;
          select = <0x00000001>;
          };
        smhc0
          {
          id = <0x00000014>;
          mode = <0x00000000>;
          pri = <0x00000001>;
          select = <0x00000001>;
          };
        smhc1
          {
          id = <0x00000015>;
          mode = <0x00000000>;
          pri = <0x00000001>;
          select = <0x00000001>;
          };
        smhc2
          {
          id = <0x00000016>;
          mode = <0x00000000>;
          pri = <0x00000001>;
          select = <0x00000001>;
          };
        usb0
          {
          id = <0x00000017>;
          mode = <0x00000000>;
          pri = <0x00000001>;
          select = <0x00000001>;
          };
        usb1
          {
          id = <0x00000018>;
          mode = <0x00000000>;
          pri = <0x00000001>;
          select = <0x00000001>;
          };
        usb2
          {
          id = <0x00000019>;
          mode = <0x00000000>;
          pri = <0x00000001>;
          select = <0x00000001>;
          };
        isp
          {
          id = <0x00000006>;
          mode = <0x00000000>;
          pri = <0x00000002>;
          select = <0x00000001>;
          };
        iommu
          {
          id = <0x0000000a>;
          mode = <0x00000000>;
          pri = <0x00000003>;
          select = <0x00000001>;
          };
        ve_r
          {
          id = <0x0000000b>;
          mode = <0x00000000>;
          pri = <0x00000002>;
          select = <0x00000001>;
          };
        ve_rw
          {
          id = <0x0000000c>;
          mode = <0x00000000>;
          pri = <0x00000002>;
          select = <0x00000001>;
          };
        de
          {
          id = <0x0000000d>;
          mode = <0x00000000>;
          pri = <0x00000002>;
          select = <0x00000001>;
          };
        csi
          {
          id = <0x0000000e>;
          mode = <0x00000000>;
          pri = <0x00000002>;
          select = <0x00000001>;
          };
        };
      npd@2070000
        {
        compatible = "allwinner,sun55i-npd";
        status = "okay";
        phandle = <0x000001ab>;
        };
      ce@3040000
        {
        compatible = "allwinner,sunxi-ce";
        device_name = "ce";
        reg = <0x00000000 0x03040000 0x00000000 0x000000a0 0x00000000 0x03040800 0x00000000 0x000000a0>;
        interrupts = <0x00000000 0x00000034 0x00000001 0x00000000 0x00000035 0x00000001>;
        clock-frequency = <0x17d78400>;
        clocks = <0x0000001a 0x0000003e 0x0000001a 0x0000003c 0x0000001a 0x00000057 0x0000001a 0x00000007 0x0000001a 0x0000003d>;
        clock-names = "bus_ce", "ce_clk", "mbus_ce", "clk_src", "ce_sys_clk";
        resets = <0x0000001a 0x00000007>;
        phandle = <0x000001ac>;
        };
      rtc@7090000
        {
        compatible = "allwinner,rtc-v201";
        device_type = "rtc";
        wakeup-source;
        reg = <0x00000000 0x07090000 0x00000000 0x00000320>;
        interrupts = <0x00000000 0x0000009d 0x00000004>;
        clocks = <0x00000019 0x0000001b 0x00000023 0x00000007 0x00000023 0x00000009>;
        clock-names = "r-ahb-rtc", "rtc-1k", "rtc-spi";
        resets = <0x00000019 0x0000000e>;
        gpr_cur_pos = <0x00000006>;
        gpr_bootcount_pos = <0x00000007>;
        phandle = <0x000001ad>;
        };
      sdmmc@4022000
        {
        compatible = "allwinner,sunxi-mmc-v4p6x";
        device_type = "sdc2";
        reg = <0x00000000 0x04022000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x0000002a 0x00000004>;
        clocks = <0x00000022 0x0000001a 0x00000010 0x0000001a 0x00000012 0x0000001a 0x00000060 0x0000001a 0x00000061>;
        clock-names = "osc24m", "pll_periph", "pll_periph_2", "mmc", "ahb";
        resets = <0x0000001a 0x00000013>;
        reset-names = "rst";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x000000bb 0x000000bc>;
        pinctrl-1 = <0x000000bd>;
        bus-width = <0x00000008>;
        req-page-count = <0x00000002>;
        cap-mmc-highspeed;
        cap-cmd23;
        mmc-cache-ctrl;
        non-removable;
        max-frequency = "
        --";
        cap-erase;
        mmc-high-capacity-erase-size;
        no-sdio;
        no-sd;
        ctl-spec-caps = <0x00000328>;
        sdc_tm4_sm0_freq0 = <0x00000000>;
        sdc_tm4_sm0_freq1 = <0x00000000>;
        sdc_tm4_sm1_freq0 = <0x00000000>;
        sdc_tm4_sm1_freq1 = <0x00000000>;
        sdc_tm4_sm2_freq0 = <0x00000000>;
        sdc_tm4_sm2_freq1 = <0x00000000>;
        sdc_tm4_sm3_freq0 = <0x05000000>;
        sdc_tm4_sm3_freq1 = <0x00000005>;
        sdc_tm4_sm4_freq0 = <0x00050000>;
        sdc_tm4_sm4_freq1 = <0x00000004>;
        sdc_tm4_sm4_freq0_cmd = <0x00000000>;
        sdc_tm4_sm4_freq1_cmd = <0x00000000>;
        mmc-ddr-1_8v;
        mmc-hs200-1_8v;
        mmc-hs400-1_8v;
        sunxi-power-save-mode;
        sunxi-dis-signal-vol-sw;
        mmc-bootpart-noacc;
        cqe-on;
        ctl-cmdq-md = <0x00000002>;
        vmmc-supply = <0x0000005d>;
        vqmmc-supply = <0x0000004f>;
        status = "disabled";
        phandle = <0x000001ae>;
        };
      sdmmc@4020000
        {
        compatible = "allwinner,sunxi-mmc-v5p3x";
        device_type = "sdc0";
        reg = <0x00000000 0x04020000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x00000028 0x00000004>;
        clocks = <0x00000022 0x0000001a 0x00000013 0x0000001a 0x00000014 0x0000001a 0x0000005e 0x0000001a 0x00000063>;
        clock-names = "osc24m", "pll_periph", "pll_periph_2", "mmc", "ahb";
        resets = <0x0000001a 0x00000015>;
        reset-names = "rst";
        pinctrl-names = "default", "mmc_1v8", "sleep", "uart_jtag";
        pinctrl-0 = <0x000000be>;
        pinctrl-1 = <0x000000bf>;
        pinctrl-2 = <0x000000c0>;
        pinctrl-3 = <0x000000c1 0x000000c2>;
        max-frequency = <0x08f0d180>;
        bus-width = <0x00000004>;
        req-page-count = <0x00000002>;
        cap-sd-highspeed;
        cap-wait-while-busy;
        ctl-spec-caps = <0x00000428>;
        status = "okay";
        cd-gpios = <0x00000059 0x00000005 0x00000006 0x00000011>;
        cd-used-24m;
        cd-set-debounce = <0x00000001>;
        sd-uhs-sdr50;
        sd-uhs-ddr50;
        sd-uhs-sdr104;
        no-sdio;
        no-mmc;
        sunxi-power-save-mode;
        sunxi-dly-208m = <0x000000ff 0x00000001 0x000000ff 0x000000ff 0x000000ff 0x000000ff>;
        vmmc-supply = <0x0000005d>;
        vqmmc33sw-supply = <0x0000005d>;
        vdmmc33sw-supply = <0x0000005d>;
        vqmmc18sw-supply = <0x0000005d>;
        vdmmc18sw-supply = <0x0000005d>;
        phandle = <0x000001af>;
        };
      sdmmc@4021000
        {
        compatible = "allwinner,sunxi-mmc-v5p3x";
        device_type = "sdc1";
        reg = <0x00000000 0x04021000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x00000029 0x00000004>;
        clocks = <0x00000022 0x0000001a 0x00000013 0x0000001a 0x00000014 0x0000001a 0x0000005f 0x0000001a 0x00000062>;
        clock-names = "osc24m", "pll_periph", "pll_periph_2", "mmc", "ahb";
        resets = <0x0000001a 0x00000014>;
        reset-names = "rst";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x000000c3 0x000000c4>;
        pinctrl-1 = <0x000000c5>;
        max-frequency = <0x08f0d180>;
        bus-width = <0x00000004>;
        cap-sd-highspeed;
        cap-sdio-irq;
        ignore-pm-notify;
        keep-power-in-suspend;
        execute_tuning_in_kernel;
        sunxi-dly-208m = <0x000000ff 0x00000001 0x000000ff 0x000000ff 0x000000ff 0x000000ff>;
        ctl-spec-caps = <0x00000428>;
        status = "okay";
        no-mmc;
        no-sd;
        cap-mmc-highspeed;
        sd-uhs-sdr25;
        sd-uhs-sdr50;
        sd-uhs-ddr50;
        sd-uhs-sdr104;
        vmmc-supply = <0x000000b0>;
        vqmmc-supply = <0x000000b0>;
        phandle = <0x000001b0>;
        };
      usbc0@10
        {
        device_type = "usbc0";
        compatible = "allwinner,sunxi-otg-manager";
        reg = <0x00000000 0x00000010 0x00000000 0x00001000>;
        usb_port_type = <0x00000002>;
        usb_detect_type = <0x00000002>;
        usb_detect_mode = <0x00000002>;
        usb_id_gpio;
        usb_det_vbus_gpio = "axp_ctrl";
        usb_regulator_io = "nocare";
        usb_wakeup_suspend = <0x00000001>;
        usb_luns = <0x00000003>;
        usb_serial_unique = <0x00000000>;
        usb_serial_number = "20080411";
        rndis_wceis = <0x00000001>;
        status = "okay";
        det_vbus_supply = <0x000000a7>;
        wakeup-source;
        phandle = <0x000001b1>;
        };
      udc-controller@4100000
        {
        compatible = "allwinner,sunxi-udc";
        reg = <0x00000000 0x04100000 0x00000000 0x00001000 0x00000000 0x00000000 0x00000000 0x00000100>;
        interrupts = <0x00000000 0x0000001d 0x00000004>;
        clocks = <0x0000001a 0x000000b7 0x0000001a 0x0000008e>;
        clock-names = "hosc", "bus_otg";
        resets = <0x0000001a 0x00000033 0x0000001a 0x00000030>;
        reset-names = "otg", "phy";
        status = "okay";
        det_vbus_supply = <0x000000a7>;
        phandle = <0x000001b2>;
        };
      ehci0-controller@4101000
        {
        compatible = "allwinner,sunxi-ehci0";
        reg = <0x00000000 0x04101000 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x04100000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x0000001e 0x00000004>;
        clocks = <0x0000001a 0x000000b7 0x0000001a 0x00000090>;
        clock-names = "hosc", "bus_hci";
        resets = <0x0000001a 0x00000035 0x0000001a 0x00000030>;
        reset-names = "hci", "phy";
        hci_ctrl_no = <0x00000000>;
        status = "okay";
        drvvbus-supply = <0x000000b7>;
        phandle = <0x000001b3>;
        };
      ohci0-controller@4101400
        {
        compatible = "allwinner,sunxi-ohci0";
        reg = <0x00000000 0x04101400 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x04100000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x0000001f 0x00000004>;
        clocks = <0x0000001a 0x000000b7 0x0000001a 0x00000092 0x0000001a 0x00000089>;
        clock-names = "hosc", "bus_hci", "ohci";
        resets = <0x0000001a 0x00000037 0x0000001a 0x00000030>;
        reset-names = "hci", "phy";
        hci_ctrl_no = <0x00000000>;
        status = "okay";
        drvvbus-supply = <0x000000b7>;
        phandle = <0x000001b4>;
        };
      usbc1@11
        {
        device_type = "usbc1";
        reg = <0x00000000 0x00000011 0x00000000 0x00001000>;
        usb_regulator_io = "nocare";
        usb_wakeup_suspend = <0x00000001>;
        status = "okay";
        wakeup-source;
        phandle = <0x000001b5>;
        };
      ehci1-controller@4200000
        {
        compatible = "allwinner,sunxi-ehci1";
        reg = <0x00000000 0x04200000 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x04100000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x00000020 0x00000004>;
        clocks = <0x0000001a 0x000000b7 0x0000001a 0x0000008f>;
        clock-names = "hosc", "bus_hci";
        resets = <0x0000001a 0x00000034 0x0000001a 0x00000031>;
        reset-names = "hci", "phy";
        hci_ctrl_no = <0x00000001>;
        status = "okay";
        drvvbus-supply = <0x000000c6>;
        vbusin-supply = <0x000000a8>;
        phandle = <0x000001b6>;
        };
      ohci1-controller@4200400
        {
        compatible = "allwinner,sunxi-ohci1";
        reg = <0x00000000 0x04200400 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x04100000 0x00000000 0x00001000>;
        interrupts = <0x00000000 0x00000021 0x00000004>;
        clocks = <0x0000001a 0x000000b7 0x0000001a 0x00000091 0x0000001a 0x0000008a>;
        clock-names = "hosc", "bus_hci", "ohci";
        resets = <0x0000001a 0x00000036 0x0000001a 0x00000031>;
        reset-names = "hci", "phy";
        hci_ctrl_no = <0x00000001>;
        status = "okay";
        drvvbus-supply = <0x000000c6>;
        vbusin-supply = <0x000000a8>;
        phandle = <0x000001b7>;
        };
      usbc2@12
        {
        device_type = "usbc2";
        compatible = "allwinner,sunxi-plat-dwc3";
        reg = <0x00000000 0x00000012 0x00000000 0x00001000>;
        #address-cells = <0x00000002>;
        #size-cells = <0x00000002>;
        ranges;
        aw,hcgen2-phygen1-quirk;
        status = "disabled";
        phandle = <0x000001b8>;
        xhci2-controller@4d00000
          {
          compatible = "snps,dwc3";
          reg = <0x00000000 0x04d00000 0x00000000 0x00100000>;
          interrupts = <0x00000000 0x00000023 0x00000004>;
          dr_mode = "otg";
          clocks = <0x0000001a 0x00000055 0x0000001a 0x0000008c 0x0000001a 0x0000008b 0x0000001a 0x0000008d>;
          clock-names = "bus_clk", "ref_clk3", "ref_clk2", "suspend";
          resets = <0x0000001a 0x00000032>;
          reset-names = "hci";
          maximum-speed = "super-speed";
          phy_type = "utmi";
          snps,dis_enblslpm_quirk;
          snps,dis-u1-entry-quirk;
          snps,dis-u2-entry-quirk;
          snps,dis_u3_susphy_quirk;
          snps,dis_u2_susphy_quirk;
          phys = <0x000000c7 0x000000c8 0x00000004>;
          phy-names = "usb2-phy", "usb3-phy";
          status = "disabled";
          phandle = <0x000001b9>;
          };
        };
      phy@4e00000
        {
        compatible = "allwinner,sunxi-plat-phy";
        reg = <0x00000000 0x04e00000 0x00000000 0x00000800>;
        #phy-cells = <0x00000000>;
        status = "disabled";
        phandle = <0x000000c7>;
        };
      vind@5800800
        {
        compatible = "allwinner,sunxi-vin-media", "simple-bus";
        #address-cells = <0x00000002>;
        #size-cells = <0x00000002>;
        ranges;
        device_id = <0x00000000>;
        csi_top = <0x15752a00>;
        csi_isp = <0x11e1a300>;
        reg = <0x00000000 0x05800800 0x00000000 0x00000200 0x00000000 0x05800000 0x00000000 0x00000800 0x00000000 0x05810000 0x00000000 0x00000100>;
        interrupts = <0x00000000 0x0000008b 0x00000004>;
        clocks = * 0xbbe288b4 [0x00000088];
        clock-names = "csi_top", "csi_top_src", "csi_mclk0", "csi_mclk0_24m", "csi_mclk0_pll", "csi_mclk1", "csi_mclk1_24m", "csi_mclk1_pll", "csi_mclk2", "csi_mclk2_24m", "csi_mclk2_pll", "csi_mclk3", "csi_mclk3_24m", "csi_mclk3_pll", "csi_isp", "csi_isp_src", "csi_bus", "csi_mbus", "csi_isp_mbus";
        resets = <0x0000001a 0x0000004b 0x0000001a 0x0000004c>;
        reset-names = "csi_ret", "isp_ret";
        pinctrl-names = "mclk0-default", "mclk0-sleep", "mclk1-default", "mclk1-sleep", "mclk2-default", "mclk2-sleep", "mclk3-default", "mclk3-sleep";
        pinctrl-0 = <0x000000c9>;
        pinctrl-1 = <0x000000ca>;
        pinctrl-2 = <0x000000cb>;
        pinctrl-3 = <0x000000cc>;
        pinctrl-4 = <0x000000cd>;
        pinctrl-5 = <0x000000ce>;
        pinctrl-6 = <0x000000cf>;
        pinctrl-7 = <0x000000d0>;
        power-domains = <0x0000001f 0x00000002>;
        dram_dfs_time = <0x00000096>;
        status = "okay";
        vind_mclkpin-supply = <0x000000ad>;
        vind_mclkpin_vol = <0x001b7740>;
        vind_mcsipin-supply = <0x0000004f>;
        vind_mcsipin_vol = <0x001b7740>;
        vind_mipipin-supply = <0x0000005d>;
        vind_mipipin_vol = <0x00325aa0>;
        phandle = <0x000001ba>;
        csi@5820000
          {
          compatible = "allwinner,sunxi-csi";
          reg = <0x00000000 0x05820000 0x00000000 0x00001000>;
          interrupts = <0x00000000 0x00000082 0x00000004>;
          device_id = <0x00000000>;
          status = "okay";
          phandle = <0x000001bb>;
          };
        csi@5821000
          {
          compatible = "allwinner,sunxi-csi";
          reg = <0x00000000 0x05821000 0x00000000 0x00001000>;
          interrupts = <0x00000000 0x00000083 0x00000004>;
          device_id = <0x00000001>;
          status = "okay";
          phandle = <0x000001bc>;
          };
        csi@5822000
          {
          compatible = "allwinner,sunxi-csi";
          reg = <0x00000000 0x05822000 0x00000000 0x00001000>;
          interrupts = <0x00000000 0x00000084 0x00000004>;
          device_id = <0x00000002>;
          status = "okay";
          phandle = <0x000001bd>;
          };
        csi@5823000
          {
          compatible = "allwinner,sunxi-csi";
          reg = <0x00000000 0x05823000 0x00000000 0x00001000>;
          interrupts = <0x00000000 0x00000093 0x00000004>;
          pinctrl-names = "default", "sleep";
          pinctrl-0 = <0x000000d1>;
          pinctrl-1 = <0x000000d2>;
          device_id = <0x00000003>;
          status = "okay";
          phandle = <0x000001be>;
          };
        mipi@5810100
          {
          compatible = "allwinner,sunxi-mipi";
          reg = <0x00000000 0x05810100 0x00000000 0x00000100 0x00000000 0x05811000 0x00000000 0x00000400>;
          interrupts = <0x00000000 0x00000089 0x00000004>;
          pinctrl-names = "mipi0-default", "mipi0-sleep", "mipi1-4lane-default", "mipi1-4lane-sleep";
          pinctrl-0 = <0x000000d3>;
          pinctrl-1 = <0x000000d4>;
          pinctrl-2 = <0x000000d5>;
          pinctrl-3 = <0x000000d6>;
          device_id = <0x00000000>;
          status = "okay";
          phandle = <0x000001bf>;
          };
        mipi@5810200
          {
          compatible = "allwinner,sunxi-mipi";
          reg = <0x00000000 0x05810200 0x00000000 0x00000100 0x00000000 0x05811400 0x00000000 0x00000400>;
          pinctrl-names = "mipi1-default", "mipi1-sleep";
          pinctrl-0 = <0x000000d7>;
          pinctrl-1 = <0x000000d8>;
          device_id = <0x00000001>;
          status = "okay";
          phandle = <0x000001c0>;
          };
        mipi@5810300
          {
          compatible = "allwinner,sunxi-mipi";
          reg = <0x00000000 0x05810300 0x00000000 0x00000100 0x00000000 0x05811800 0x00000000 0x00000400>;
          pinctrl-names = "mipi2-default", "mipi2-sleep", "mipi3-4lane-default", "mipi3-4lane-sleep";
          pinctrl-0 = <0x000000d9>;
          pinctrl-1 = <0x000000da>;
          pinctrl-2 = <0x000000db>;
          pinctrl-3 = <0x000000dc>;
          device_id = <0x00000002>;
          status = "okay";
          phandle = <0x000001c1>;
          };
        mipi@5810400
          {
          compatible = "allwinner,sunxi-mipi";
          reg = <0x00000000 0x05810400 0x00000000 0x00000100 0x00000000 0x05811c00 0x00000000 0x00000400>;
          pinctrl-names = "mipi3-default", "mipi3-sleep";
          pinctrl-0 = <0x000000dd>;
          pinctrl-1 = <0x000000de>;
          device_id = <0x00000003>;
          status = "okay";
          phandle = <0x000001c2>;
          };
        tdm@5908000
          {
          compatible = "allwinner,sunxi-tdm";
          reg = <0x00000000 0x05908000 0x00000000 0x00000300>;
          interrupts = <0x00000000 0x0000008a 0x00000004>;
          work_mode = <0x00000000>;
          device_id = <0x00000000>;
          iommus = <0x0000001e 0x00000000 0x00000000>;
          status = "okay";
          phandle = <0x000001c3>;
          };
        isp@5900000
          {
          compatible = "allwinner,sunxi-isp";
          reg = <0x00000000 0x05900000 0x00000000 0x00001300>;
          interrupts = <0x00000000 0x00000085 0x00000004>;
          work_mode = <0x00000000>;
          device_id = <0x00000000>;
          iommus = <0x0000001e 0x00000000 0x00000000>;
          status = "okay";
          phandle = <0x000001c4>;
          };
        isp@58ffffc
          {
          compatible = "allwinner,sunxi-isp";
          reg = <0x00000000 0x058ffffc 0x00000000 0x00001304>;
          interrupts = <0x00000000 0x00000086 0x00000004>;
          work_mode = <0x000000ff>;
          device_id = <0x00000001>;
          iommus = <0x0000001e 0x00000000 0x00000000>;
          status = "disabled";
          phandle = <0x000001c5>;
          };
        isp@58ffff8
          {
          compatible = "allwinner,sunxi-isp";
          reg = <0x00000000 0x058ffff8 0x00000000 0x00001308>;
          interrupts = <0x00000000 0x00000087 0x00000004>;
          work_mode = <0x000000ff>;
          device_id = <0x00000002>;
          iommus = <0x0000001e 0x00000000 0x00000000>;
          status = "disabled";
          phandle = <0x000001c6>;
          };
        isp@58ffff4
          {
          compatible = "allwinner,sunxi-isp";
          reg = <0x00000000 0x058ffff4 0x00000000 0x0000130c>;
          interrupts = <0x00000000 0x00000088 0x00000004>;
          work_mode = <0x000000ff>;
          device_id = <0x00000003>;
          iommus = <0x0000001e 0x00000000 0x00000000>;
          status = "disabled";
          phandle = <0x000001c7>;
          };
        isp@4
          {
          compatible = "allwinner,sunxi-isp";
          device_id = <0x00000004>;
          iommus = <0x0000001e 0x00000000 0x00000000>;
          status = "okay";
          phandle = <0x000001c8>;
          };
        isp@5
          {
          compatible = "allwinner,sunxi-isp";
          device_id = <0x00000005>;
          iommus = <0x0000001e 0x00000000 0x00000000>;
          status = "okay";
          phandle = <0x000001c9>;
          };
        isp@6
          {
          compatible = "allwinner,sunxi-isp";
          device_id = <0x00000006>;
          iommus = <0x0000001e 0x00000000 0x00000000>;
          status = "okay";
          phandle = <0x000001ca>;
          };
        scaler@5910000
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x05910000 0x00000000 0x00000400>;
          interrupts = <0x00000000 0x0000007e 0x00000004>;
          work_mode = <0x00000000>;
          device_id = <0x00000000>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "okay";
          phandle = <0x000001cb>;
          };
        scaler@590fffc
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x0590fffc 0x00000000 0x00000404>;
          work_mode = <0x000000ff>;
          device_id = <0x00000001>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001cc>;
          };
        scaler@590fff8
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x0590fff8 0x00000000 0x00000408>;
          work_mode = <0x000000ff>;
          device_id = <0x00000002>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001cd>;
          };
        scaler@590fff4
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x0590fff4 0x00000000 0x0000040c>;
          work_mode = <0x000000ff>;
          device_id = <0x00000003>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001ce>;
          };
        scaler@5910400
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x05910400 0x00000000 0x00000400>;
          interrupts = <0x00000000 0x0000007f 0x00000004>;
          work_mode = <0x00000000>;
          device_id = <0x00000004>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "okay";
          phandle = <0x000001cf>;
          };
        scaler@59103fc
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x059103fc 0x00000000 0x00000404>;
          work_mode = <0x000000ff>;
          device_id = <0x00000005>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001d0>;
          };
        scaler@59103f8
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x059103f8 0x00000000 0x00000408>;
          work_mode = <0x000000ff>;
          device_id = <0x00000006>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001d1>;
          };
        scaler@59103f4
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x059103f4 0x00000000 0x0000040c>;
          work_mode = <0x000000ff>;
          device_id = <0x00000007>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001d2>;
          };
        scaler@5910800
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x05910800 0x00000000 0x00000400>;
          interrupts = <0x00000000 0x00000080 0x00000004>;
          work_mode = <0x00000000>;
          device_id = <0x00000008>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "okay";
          phandle = <0x000001d3>;
          };
        scaler@59107fc
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x059107fc 0x00000000 0x00000404>;
          work_mode = <0x000000ff>;
          device_id = <0x00000009>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001d4>;
          };
        scaler@59107f8
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x059107f8 0x00000000 0x00000408>;
          work_mode = <0x000000ff>;
          device_id = <0x0000000a>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001d5>;
          };
        scaler@59107f4
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x059107f4 0x00000000 0x0000040c>;
          work_mode = <0x000000ff>;
          device_id = <0x0000000b>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001d6>;
          };
        scaler@5910c00
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x05910c00 0x00000000 0x00000400>;
          interrupts = <0x00000000 0x00000081 0x00000004>;
          work_mode = <0x00000000>;
          device_id = <0x0000000c>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "okay";
          phandle = <0x000001d7>;
          };
        scaler@5910bfc
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x05910bfc 0x00000000 0x00000404>;
          work_mode = <0x000000ff>;
          device_id = <0x0000000d>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001d8>;
          };
        scaler@5910bf8
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x05910bf8 0x00000000 0x00000408>;
          work_mode = <0x000000ff>;
          device_id = <0x0000000e>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001d9>;
          };
        scaler@5910bf4
          {
          compatible = "allwinner,sunxi-scaler";
          reg = <0x00000000 0x05910bf4 0x00000000 0x0000040c>;
          work_mode = <0x000000ff>;
          device_id = <0x0000000f>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001da>;
          };
        scaler@16
          {
          compatible = "allwinner,sunxi-scaler";
          device_id = <0x00000010>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001db>;
          };
        scaler@17
          {
          compatible = "allwinner,sunxi-scaler";
          device_id = <0x00000011>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001dc>;
          };
        actuator@2108180
          {
          compatible = "allwinner,sunxi-actuator";
          device_type = "actuator0";
          reg = <0x00000000 0x02108180 0x00000000 0x00000010>;
          actuator0_name = "ad5820_act";
          actuator0_slave = <0x00000018>;
          actuator0_af_pwdn;
          actuator0_afvdd = "afvcc-csi";
          actuator0_afvdd_vol = <0x002ab980>;
          status = "disabled";
          phandle = <0x000000e0>;
          };
        flash@2108190
          {
          device_type = "flash0";
          compatible = "allwinner,sunxi-flash";
          reg = <0x00000000 0x02108190 0x00000000 0x00000010>;
          flash0_type = <0x00000002>;
          flash0_en;
          flash0_mode;
          flash0_flvdd = "";
          flash0_flvdd_vol;
          device_id = <0x00000000>;
          status = "disabled";
          phandle = <0x000000df>;
          };
        sensor@5812000
          {
          reg = <0x00000000 0x05812000 0x00000000 0x00000010>;
          device_type = "sensor0";
          compatible = "allwinner,sunxi-sensor";
          sensor0_mname = "imx219";
          sensor0_twi_cci_id = <0x00000004>;
          sensor0_twi_addr = <0x00000020>;
          sensor0_mclk_id = <0x00000000>;
          sensor0_pos = "rear";
          sensor0_isp_used = <0x00000001>;
          sensor0_fmt = <0x00000001>;
          sensor0_stby_mode = <0x00000000>;
          sensor0_vflip = <0x00000000>;
          sensor0_hflip = <0x00000000>;
          sensor0_iovdd-supply;
          sensor0_iovdd_vol;
          sensor0_avdd-supply;
          sensor0_avdd_vol;
          sensor0_dvdd-supply;
          sensor0_dvdd_vol;
          sensor0_power_en;
          sensor0_reset = <0x00000059 0x00000004 0x00000009 0x00000001>;
          sensor0_pwdn = <0x00000059 0x00000004 0x00000008 0x00000000>;
          sensor0_sm_vs;
          flash_handle = <0x000000df>;
          act_handle = <0x000000e0>;
          device_id = <0x00000000>;
          status = "okay";
          sensor0_cameravdd-supply;
          sensor0_cameravdd_vol;
          phandle = <0x000001dd>;
          };
        sensor@5812010
          {
          reg = <0x00000000 0x05812010 0x00000000 0x00000010>;
          device_type = "sensor1";
          compatible = "allwinner,sunxi-sensor";
          sensor1_mname = "ov5647";
          sensor1_twi_cci_id = <0x00000003>;
          sensor1_twi_addr = <0x0000006c>;
          sensor1_mclk_id = <0x00000001>;
          sensor1_pos = "front";
          sensor1_isp_used = <0x00000000>;
          sensor1_fmt = <0x00000000>;
          sensor1_stby_mode = <0x00000000>;
          sensor1_vflip = <0x00000000>;
          sensor1_hflip = <0x00000000>;
          sensor1_iovdd-supply;
          sensor1_iovdd_vol;
          sensor1_avdd-supply;
          sensor1_avdd_vol;
          sensor1_dvdd-supply;
          sensor1_dvdd_vol;
          sensor1_power_en;
          sensor1_reset;
          sensor1_pwdn;
          sensor1_sm_vs;
          flash_handle;
          act_handle;
          device_id = <0x00000001>;
          status = "disabled";
          phandle = <0x000001de>;
          };
        sensor@5812020
          {
          reg = <0x00000000 0x05812020 0x00000000 0x00000010>;
          device_type = "sensor2";
          compatible = "allwinner,sunxi-sensor";
          sensor2_mname = "imx386_mipi";
          sensor2_twi_cci_id = <0x00000003>;
          sensor2_twi_addr = <0x0000006c>;
          sensor2_mclk_id = <0x00000001>;
          sensor2_pos = "rear";
          sensor2_isp_used = <0x00000000>;
          sensor2_fmt = <0x00000000>;
          sensor2_stby_mode = <0x00000000>;
          sensor2_vflip = <0x00000000>;
          sensor2_hflip = <0x00000000>;
          sensor2_iovdd-supply;
          sensor2_iovdd_vol;
          sensor2_avdd-supply;
          sensor2_avdd_vol;
          sensor2_dvdd-supply;
          sensor2_dvdd_vol;
          sensor2_power_en;
          sensor2_reset;
          sensor2_pwdn;
          sensor2_sm_vs;
          flash_handle;
          act_handle;
          device_id = <0x00000002>;
          status = "disabled";
          phandle = <0x000001df>;
          };
        sensor@5812030
          {
          reg = <0x00000000 0x05812030 0x00000000 0x00000010>;
          device_type = "sensor3";
          compatible = "allwinner,sunxi-sensor";
          sensor3_mname = "imx317_mipi";
          sensor3_twi_cci_id = <0x00000003>;
          sensor3_twi_addr = <0x0000006c>;
          sensor3_mclk_id = <0x00000001>;
          sensor3_pos = "rear";
          sensor3_isp_used = <0x00000000>;
          sensor3_fmt = <0x00000000>;
          sensor3_stby_mode = <0x00000000>;
          sensor3_vflip = <0x00000000>;
          sensor3_hflip = <0x00000000>;
          sensor3_iovdd-supply;
          sensor3_iovdd_vol;
          sensor3_avdd-supply;
          sensor3_avdd_vol;
          sensor3_dvdd-supply;
          sensor3_dvdd_vol;
          sensor3_power_en;
          sensor3_reset;
          sensor3_pwdn;
          sensor3_sm_vs;
          flash_handle;
          act_handle;
          device_id = <0x00000002>;
          status = "disabled";
          phandle = <0x000001e0>;
          };
        sensor_list@5812040
          {
          reg = <0x00000000 0x05812040 0x00000000 0x00000010>;
          device_type = "sensor_list0";
          compatible = "allwinner,sunxi-sensor-list";
          csi_sel = <0x00000000>;
          sensor00_mname = "ov5675_mipi_b";
          sensor00_twi_addr = <0x00000060>;
          sensor00_type = <0x00000001>;
          sensor00_hflip = <0x00000001>;
          sensor00_vflip = <0x00000000>;
          sensor00_act_used = <0x00000001>;
          sensor00_act_name = "dw9714_act";
          sensor00_act_twi_addr = <0x00000018>;
          sensor01_mname = "gc05a2_mipi_b";
          sensor01_twi_addr = <0x00000062>;
          sensor01_type = <0x00000001>;
          sensor01_hflip = <0x00000000>;
          sensor01_vflip = <0x00000000>;
          sensor01_act_used = <0x00000001>;
          sensor01_act_name = "dw9714_act";
          sensor01_act_twi_addr = <0x00000018>;
          sensor02_mname = "gc5035_mipi_b";
          sensor02_twi_addr = <0x00000064>;
          sensor02_type = <0x00000001>;
          sensor02_hflip = <0x00000000>;
          sensor02_vflip = <0x00000000>;
          sensor02_act_used = <0x00000001>;
          sensor02_act_name = "dw9714_act";
          sensor02_act_twi_addr = <0x00000018>;
          device_id = <0x00000000>;
          status = "disabled";
          phandle = <0x000001e1>;
          };
        sensor_list@5812050
          {
          reg = <0x00000000 0x05812050 0x00000000 0x00000010>;
          device_type = "sensor_list1";
          compatible = "allwinner,sunxi-sensor-list";
          csi_sel = <0x00000000>;
          sensor10_mname = "ov02a10_mipi_f";
          sensor10_twi_addr = <0x00000070>;
          sensor10_type = <0x00000001>;
          sensor10_hflip = <0x00000001>;
          sensor10_vflip = <0x00000000>;
          sensor10_act_used = <0x00000000>;
          sensor10_act_name = "";
          sensor10_act_twi_addr;
          sensor11_mname = "gc02m1_mipi_f";
          sensor11_twi_addr = <0x00000072>;
          sensor11_type = <0x00000001>;
          sensor11_hflip = <0x00000001>;
          sensor11_vflip = <0x00000000>;
          sensor11_act_used = <0x00000000>;
          sensor11_act_name = "";
          sensor11_act_twi_addr;
          sensor12_mname = "gc02m2_mipi_f";
          sensor12_twi_addr = <0x00000074>;
          sensor12_type = <0x00000001>;
          sensor12_hflip = <0x00000000>;
          sensor12_vflip = <0x00000000>;
          sensor12_act_used = <0x00000000>;
          sensor12_act_name = "";
          sensor12_act_twi_addr;
          device_id = <0x00000001>;
          status = "disabled";
          phandle = <0x000001e2>;
          };
        vinc@5830000
          {
          device_type = "vinc0";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05830000 0x00000000 0x00001000>;
          interrupts = <0x00000000 0x0000007a 0x00000004>;
          vinc0_csi_sel = <0x00000000>;
          vinc0_mipi_sel = <0x00000000>;
          vinc0_isp_sel = <0x00000000>;
          vinc0_isp_tx_ch = <0x00000000>;
          vinc0_tdm_rx_sel = <0x00000000>;
          vinc0_rear_sensor_sel = <0x00000000>;
          vinc0_front_sensor_sel = <0x00000000>;
          vinc0_sensor_list = <0x00000000>;
          device_id = <0x00000000>;
          work_mode = <0x00000000>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "okay";
          phandle = <0x000001e3>;
          };
        vinc@582fffc
          {
          device_type = "vinc1";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x0582fffc 0x00000000 0x00001004>;
          vinc1_csi_sel = <0x00000001>;
          vinc1_mipi_sel = <0x00000002>;
          vinc1_isp_sel = <0x00000001>;
          vinc1_isp_tx_ch = <0x00000000>;
          vinc1_tdm_rx_sel = <0x00000001>;
          vinc1_rear_sensor_sel = <0x00000001>;
          vinc1_front_sensor_sel = <0x00000001>;
          vinc1_sensor_list = <0x00000000>;
          device_id = <0x00000001>;
          work_mode = <0x000000ff>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001e4>;
          };
        vinc@582fff8
          {
          device_type = "vinc2";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x0582fff8 0x00000000 0x00001008>;
          vinc2_csi_sel = <0x00000002>;
          vinc2_mipi_sel = <0x000000ff>;
          vinc2_isp_sel = <0x00000002>;
          vinc2_isp_tx_ch = <0x00000002>;
          vinc2_tdm_rx_sel = <0x00000002>;
          vinc2_rear_sensor_sel = <0x00000000>;
          vinc2_front_sensor_sel = <0x00000000>;
          vinc2_sensor_list = <0x00000000>;
          device_id = <0x00000002>;
          work_mode = <0x000000ff>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001e5>;
          };
        vinc@582fff4
          {
          device_type = "vinc3";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x0582fff4 0x00000000 0x0000100c>;
          vinc3_csi_sel = <0x00000000>;
          vinc3_mipi_sel = <0x000000ff>;
          vinc3_isp_sel = <0x00000000>;
          vinc3_isp_tx_ch = <0x00000000>;
          vinc3_tdm_rx_sel = <0x00000000>;
          vinc3_rear_sensor_sel = <0x00000001>;
          vinc3_front_sensor_sel = <0x00000001>;
          vinc3_sensor_list = <0x00000000>;
          device_id = <0x00000003>;
          work_mode = <0x000000ff>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001e6>;
          };
        vinc@5831000
          {
          device_type = "vinc4";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05831000 0x00000000 0x00001000>;
          interrupts = <0x00000000 0x0000007b 0x00000004>;
          vinc4_csi_sel = <0x00000000>;
          vinc4_mipi_sel = <0x00000000>;
          vinc4_isp_sel = <0x00000000>;
          vinc4_isp_tx_ch = <0x00000000>;
          vinc4_tdm_rx_sel = <0x00000000>;
          vinc4_rear_sensor_sel = <0x00000000>;
          vinc4_front_sensor_sel = <0x00000000>;
          vinc4_sensor_list = <0x00000000>;
          device_id = <0x00000004>;
          work_mode = <0x00000000>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001e7>;
          };
        vinc@5830ffc
          {
          device_type = "vinc5";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05830ffc 0x00000000 0x00001004>;
          vinc5_csi_sel = <0x00000002>;
          vinc5_mipi_sel = <0x000000ff>;
          vinc5_isp_sel = <0x00000001>;
          vinc5_isp_tx_ch = <0x00000001>;
          vinc5_tdm_rx_sel = <0x00000001>;
          vinc5_rear_sensor_sel = <0x00000000>;
          vinc5_front_sensor_sel = <0x00000000>;
          vinc5_sensor_list = <0x00000000>;
          device_id = <0x00000005>;
          work_mode = <0x000000ff>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001e8>;
          };
        vinc@5830ff8
          {
          device_type = "vinc6";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05830ff8 0x00000000 0x00001008>;
          vinc6_csi_sel = <0x00000002>;
          vinc6_mipi_sel = <0x000000ff>;
          vinc6_isp_sel = <0x00000000>;
          vinc6_isp_tx_ch = <0x00000000>;
          vinc6_tdm_rx_sel = <0x00000000>;
          vinc6_rear_sensor_sel = <0x00000000>;
          vinc6_front_sensor_sel = <0x00000000>;
          vinc6_sensor_list = <0x00000000>;
          device_id = <0x00000006>;
          work_mode = <0x000000ff>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001e9>;
          };
        vinc@5830ff4
          {
          device_type = "vinc7";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05830ff4 0x00000000 0x0000100c>;
          vinc7_csi_sel = <0x00000002>;
          vinc7_mipi_sel = <0x000000ff>;
          vinc7_isp_sel = <0x00000000>;
          vinc7_isp_tx_ch = <0x00000000>;
          vinc7_tdm_rx_sel = <0x00000000>;
          vinc7_rear_sensor_sel = <0x00000000>;
          vinc7_front_sensor_sel = <0x00000000>;
          vinc7_sensor_list = <0x00000000>;
          device_id = <0x00000007>;
          work_mode = <0x000000ff>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001ea>;
          };
        vinc@5832000
          {
          device_type = "vinc8";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05832000 0x00000000 0x00001000>;
          interrupts = <0x00000000 0x0000007c 0x00000004>;
          vinc8_csi_sel = <0x00000002>;
          vinc8_mipi_sel = <0x00000002>;
          vinc8_isp_sel = <0x00000000>;
          vinc8_isp_tx_ch = <0x00000000>;
          vinc8_tdm_rx_sel = <0x00000000>;
          vinc8_rear_sensor_sel = <0x00000001>;
          vinc8_front_sensor_sel = <0x00000001>;
          vinc8_sensor_list = <0x00000000>;
          device_id = <0x00000008>;
          work_mode = <0x00000000>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001eb>;
          };
        vinc@5831ffc
          {
          device_type = "vinc9";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05831ffc 0x00000000 0x00001004>;
          vinc9_csi_sel = <0x00000002>;
          vinc9_mipi_sel = <0x000000ff>;
          vinc9_isp_sel = <0x00000000>;
          vinc9_isp_tx_ch = <0x00000000>;
          vinc9_tdm_rx_sel = <0x00000000>;
          vinc9_rear_sensor_sel = <0x00000000>;
          vinc9_front_sensor_sel = <0x00000000>;
          vinc9_sensor_list = <0x00000000>;
          device_id = <0x00000009>;
          work_mode = <0x000000ff>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001ec>;
          };
        vinc@5831ff8
          {
          device_type = "vinc10";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05831ff8 0x00000000 0x00001008>;
          vinc10_csi_sel = <0x00000002>;
          vinc10_mipi_sel = <0x000000ff>;
          vinc10_isp_sel = <0x00000000>;
          vinc10_isp_tx_ch = <0x00000000>;
          vinc10_tdm_rx_sel = <0x00000000>;
          vinc10_rear_sensor_sel = <0x00000000>;
          vinc10_front_sensor_sel = <0x00000000>;
          vinc10_sensor_list = <0x00000000>;
          device_id = <0x0000000a>;
          work_mode = <0x000000ff>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001ed>;
          };
        vinc@5831ff4
          {
          device_type = "vinc11";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05831ff4 0x00000000 0x0000100c>;
          vinc11_csi_sel = <0x00000002>;
          vinc11_mipi_sel = <0x000000ff>;
          vinc11_isp_sel = <0x00000000>;
          vinc11_isp_tx_ch = <0x00000000>;
          vinc11_tdm_rx_sel = <0x00000000>;
          vinc11_rear_sensor_sel = <0x00000000>;
          vinc11_front_sensor_sel = <0x00000000>;
          vinc11_sensor_list = <0x00000000>;
          device_id = <0x0000000b>;
          work_mode = <0x000000ff>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001ee>;
          };
        vinc@5833000
          {
          device_type = "vinc12";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05833000 0x00000000 0x00001000>;
          interrupts = <0x00000000 0x0000007d 0x00000004>;
          vinc12_csi_sel = <0x00000002>;
          vinc12_mipi_sel = <0x00000002>;
          vinc12_isp_sel = <0x00000000>;
          vinc12_isp_tx_ch = <0x00000000>;
          vinc12_tdm_rx_sel = <0x00000000>;
          vinc12_rear_sensor_sel = <0x00000001>;
          vinc12_front_sensor_sel = <0x00000001>;
          vinc12_sensor_list = <0x00000000>;
          device_id = <0x0000000c>;
          work_mode = <0x00000000>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001ef>;
          };
        vinc@5832ffc
          {
          device_type = "vinc13";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05832ffc 0x00000000 0x00001004>;
          vinc13_csi_sel = <0x00000002>;
          vinc13_mipi_sel = <0x000000ff>;
          vinc13_isp_sel = <0x00000000>;
          vinc13_isp_tx_ch = <0x00000000>;
          vinc13_tdm_rx_sel = <0x00000000>;
          vinc13_rear_sensor_sel = <0x00000000>;
          vinc13_front_sensor_sel = <0x00000000>;
          vinc13_sensor_list = <0x00000000>;
          device_id = <0x0000000d>;
          work_mode = <0x000000ff>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001f0>;
          };
        vinc@5832ff8
          {
          device_type = "vinc14";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05832ff8 0x00000000 0x00001008>;
          vinc14_csi_sel = <0x00000002>;
          vinc14_mipi_sel = <0x000000ff>;
          vinc14_isp_sel = <0x00000000>;
          vinc14_isp_tx_ch = <0x00000000>;
          vinc14_tdm_rx_sel = <0x00000000>;
          vinc14_rear_sensor_sel = <0x00000000>;
          vinc14_front_sensor_sel = <0x00000000>;
          vinc14_sensor_list = <0x00000000>;
          device_id = <0x0000000e>;
          work_mode = <0x000000ff>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001f1>;
          };
        vinc@5832ff4
          {
          device_type = "vinc15";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05832ff4 0x00000000 0x0000100c>;
          vinc15_csi_sel = <0x00000002>;
          vinc15_mipi_sel = <0x000000ff>;
          vinc15_isp_sel = <0x00000000>;
          vinc15_isp_tx_ch = <0x00000000>;
          vinc15_tdm_rx_sel = <0x00000000>;
          vinc15_rear_sensor_sel = <0x00000000>;
          vinc15_front_sensor_sel = <0x00000000>;
          vinc15_sensor_list = <0x00000000>;
          device_id = <0x0000000f>;
          work_mode = <0x000000ff>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001f2>;
          };
        vinc@5834000
          {
          device_type = "vinc16";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05834000 0x00000000 0x00001000>;
          interrupts = <0x00000000 0x00000091 0x00000004>;
          vinc16_csi_sel = <0x00000002>;
          vinc16_mipi_sel = <0x000000ff>;
          vinc16_isp_sel = <0x00000000>;
          vinc16_isp_tx_ch = <0x00000000>;
          vinc16_tdm_rx_sel = <0x00000000>;
          vinc16_rear_sensor_sel = <0x00000000>;
          vinc16_front_sensor_sel = <0x00000000>;
          vinc16_sensor_list = <0x00000000>;
          device_id = <0x00000010>;
          work_mode = <0x00000000>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001f3>;
          };
        vinc@5835000
          {
          device_type = "vinc17";
          compatible = "allwinner,sunxi-vin-core";
          reg = <0x00000000 0x05835000 0x00000000 0x00001000>;
          interrupts = <0x00000000 0x00000092 0x00000004>;
          vinc17_csi_sel = <0x00000002>;
          vinc17_mipi_sel = <0x000000ff>;
          vinc17_isp_sel = <0x00000000>;
          vinc17_isp_tx_ch = <0x00000000>;
          vinc17_tdm_rx_sel = <0x00000000>;
          vinc17_rear_sensor_sel = <0x00000000>;
          vinc17_front_sensor_sel = <0x00000000>;
          vinc17_sensor_list = <0x00000000>;
          device_id = <0x00000011>;
          work_mode = <0x00000000>;
          iommus = <0x0000001e 0x00000001 0x00000000>;
          status = "disabled";
          phandle = <0x000001f4>;
          };
        };
      deinterlace@5400000
        {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        compatible = "allwinner,sunxi-deinterlace";
        reg = <0x00000000 0x05400000 0x00000000 0x00040000>;
        interrupts = <0x00000000 0x00000058 0x00000004>;
        iommus = <0x0000001e 0x00000006 0x00000001>;
        power-domains = <0x0000001f 0x00000003>;
        status = "okay";
        clocks = <0x0000001a 0x00000036 0x0000001a 0x00000037 0x0000001a 0x0000001a>;
        clock-names = "clk_di", "clk_bus_di", "clk_di_parent";
        clock-frequency = <0x11e1a300>;
        resets = <0x0000001a 0x00000003>;
        reset-names = "rst_bus_di";
        phandle = <0x000001f5>;
        };
      gpu@1800000
        {
        device_type = "gpu";
        compatible = "arm,mali-valhall";
        reg = <0x00000000 0x01800000 0x00000000 0x00010000>;
        interrupts = <0x00000000 0x00000075 0x00000004 0x00000000 0x00000076 0x00000004 0x00000000 0x00000077 0x00000004>;
        interrupt-names = "job", "mmu", "gpu";
        clocks = <0x0000001a 0x0000003a 0x0000001a 0x0000003b 0x0000001a 0x00000018>;
        clock-names = "clk_mali", "clk_bus", "clk_parent";
        resets = <0x0000001a 0x00000005>;
        operating-points-v2 = <0x000000e1>;
        #cooling-cells = <0x00000002>;
        gpu_idle = <0x00000001>;
        dvfs_status = <0x00000001>;
        mali-supply = <0x00000020>;
        phandle = <0x00000016>;
        ipa_dvfs
          {
          compatible = "arm,mali-simple-power-model";
          static-coefficient = <0x0000027c>;
          dynamic-coefficient = <0x0000059a>;
          ts = <0x00cc77c0 0x00034fa8 0xffffd508 0x000000c8>;
          thermal-zone = "gpu_thermal_zone";
          phandle = <0x000001f6>;
          };
        };
      gpu-opp-table
        {
        compatible = "allwinner, mali-valhall-operating-points";
        phandle = <0x000000e1>;
        opp@150000000
          {
          opp-hz = <0x00000000 0x08f0d180>;
          opp-microvolt = <0x000dbba0>;
          };
        opp@200000000
          {
          opp-hz = <0x00000000 0x0bebc200>;
          opp-microvolt = <0x000dbba0>;
          };
        opp@300000000
          {
          opp-hz = <0x00000000 0x11e1a300>;
          opp-microvolt = <0x000dbba0>;
          };
        opp@400000000
          {
          opp-hz = <0x00000000 0x17d78400>;
          opp-microvolt = <0x000dbba0>;
          };
        opp@600000000
          {
          opp-hz = <0x00000000 0x23c34600>;
          opp-microvolt = <0x000dbba0>;
          };
        opp@648000000
          {
          opp-hz = <0x00000000 0x269fb200>;
          opp-microvolt = <0x00000000>;
          opp-microvolt-vf0900 = <0x000dbba0>;
          };
        opp@696000000
          {
          opp-hz = <0x00000000 0x297c1e00>;
          opp-microvolt = <0x00000000>;
          opp-microvolt-vf1920 = <0x000dbba0>;
          opp-microvolt-vf2920 = <0x000dbba0>;
          opp-microvolt-vf3920 = <0x000dbba0>;
          opp-microvolt-vf21920 = <0x000dbba0>;
          opp-microvolt-vf31920 = <0x000dbba0>;
          opp-microvolt-vf5920 = <0x000dbba0>;
          };
        opp@744000000
          {
          opp-hz = <0x00000000 0x2c588a00>;
          opp-microvolt = <0x00000000>;
          opp-microvolt-vf4920 = <0x000dbba0>;
          };
        opp@792000000
          {
          opp-hz = <0x00000000 0x2f34f600>;
          opp-microvolt = <0x00000000>;
          };
        };
      phy@4f00000
        {
        compatible = "allwinner,inno-combphy";
        reg = <0x00000000 0x04f00000 0x00000000 0x00080000 0x00000000 0x04f80000 0x00000000 0x00080000>;
        reg-names = "phy-ctl", "phy-clk";
        power-domains = <0x0000001f 0x00000007>;
        phy_refclk_sel = <0x00000000>;
        clocks = <0x0000001a 0x0000008c 0x0000001a 0x00000009>;
        clock-names = "phyclk_ref", "refclk_par";
        resets = <0x0000001a 0x0000003b>;
        reset-names = "phy_rst";
        #phy-cells = <0x00000001>;
        status = "okay";
        phy_use_sel = <0x00000000>;
        phandle = <0x000000c8>;
        };
      pcie@4800000
        {
        compatible = "allwinner,sunxi-pcie-v210-rc";
        #address-cells = <0x00000003>;
        #size-cells = <0x00000002>;
        bus-range = <0x00000000 0x000000ff>;
        reg = <0x00000000 0x04800000 0x00000000 0x00480000>;
        reg-names = "dbi";
        device_type = "pci";
        ranges = * 0xbbe2d43c [0x00000054];
        num-lanes = <0x00000001>;
        phys = <0x000000c8 0x00000002>;
        phy-names = "pcie-phy";
        interrupts = * 0xbbe2d4d8 [0x00000078];
        interrupt-names = "msi", "sii", "edma-w0", "edma-w1", "edma-w2", "edma-w3", "edma-r0", "edma-r1", "edma-r2", "edma-r3";
        #interrupt-cells = <0x00000001>;
        num-edma = <0x00000004>;
        max-link-speed = <0x00000002>;
        num-ib-windows = <0x00000008>;
        num-ob-windows = <0x00000008>;
        linux,pci-domain = <0x00000000>;
        power-domains = <0x0000001f 0x00000007>;
        clocks = <0x00000022 0x0000001a 0x00000094>;
        clock-names = "hosc", "pclk_aux";
        status = "okay";
        reset-gpios = <0x00000059 0x00000007 0x0000000b 0x00000000>;
        wake-gpios = <0x00000059 0x00000007 0x0000000c 0x00000000>;
        clk-freq-100m;
        pcie3v3-supply = <0x000000e2>;
        pcie1v8-supply = <0x000000e3>;
        phandle = <0x000001f7>;
        };
      codec@7110000
        {
        #sound-dai-cells = <0x00000000>;
        compatible = "allwinner,sunxi-snd-codec";
        reg = <0x00000000 0x07110000 0x00000000 0x00000348>;
        resets = <0x00000070 0x00000006>;
        clocks = * 0xbbe2d760 [0x00000048];
        clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_audio", "clk_pll_audio0_4x", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_audio_dac", "clk_audio_adc";
        interrupts = <0x00000000 0x000000be 0x00000004>;
        status = "disabled";
        phandle = <0x000000e5>;
        };
      codec_plat
        {
        #sound-dai-cells = <0x00000000>;
        compatible = "allwinner,sunxi-snd-plat-aaudio";
        dac-txdata = <0x07110020>;
        adc-txdata = <0x07110040>;
        dmas = <0x0000009e 0x00000007 0x0000009e 0x00000007>;
        dma-names = "tx", "rx";
        playback-cma = <0x00000080>;
        capture-cma = <0x00000080>;
        tx-fifo-size = <0x00000080>;
        rx-fifo-size = <0x00000080>;
        status = "disabled";
        phandle = <0x000000e4>;
        };
      codec_mach
        {
        compatible = "allwinner,sunxi-snd-mach";
        soundcard-mach,name = "audiocodec";
        soundcard-mach,pin-switches = "mic1", "mic2", "mic3", "lineoutl", "lineoutr", "hpout", "spk";
        soundcard-mach,routing = "mic1p_pin", "mic1", "mic1n_pin", "mic1", "mic2p_pin", "mic2", "mic2n_pin", "mic2", "mic3p_pin", "mic3", "mic3n_pin", "mic3", "lineoutl", "lineoutlp_pin", "lineoutl", "lineoutln_pin", "lineoutr", "lineoutrp_pin", "lineoutr", "lineoutrn_pin", "spk", "lineoutlp_pin", "spk", "lineoutln_pin", "spk", "lineoutrp_pin", "spk", "lineoutrn_pin", "hpout", "hpoutl_pin", "hpout", "hpoutr_pin";
        soundcard-mach,jack-support = <0x00000001>;
        status = "disabled";
        phandle = <0x000001f8>;
        soundcard-mach,cpu
          {
          sound-dai = <0x000000e4>;
          };
        soundcard-mach,codec
          {
          sound-dai = <0x000000e5>;
          soundcard-mach,pll-fs = <0x00000001>;
          };
        };
      hdmi_codec
        {
        #sound-dai-cells = <0x00000000>;
        compatible = "allwinner,sunxi-snd-codec-hdmi";
        status = "okay";
        extcon = <0x000000e6>;
        phandle = <0x000000ed>;
        };
      edp_codec
        {
        #sound-dai-cells = <0x00000000>;
        compatible = "allwinner,sunxi-snd-codec-edp";
        status = "disabled";
        phandle = <0x000001f9>;
        };
      owa_plat@7116000
        {
        #sound-dai-cells = <0x00000000>;
        compatible = "allwinner,sunxi-snd-plat-owa";
        reg = <0x00000000 0x07116000 0x00000000 0x00000058>;
        interrupts = <0x00000000 0x000000c4 0x00000004>;
        resets = <0x00000070 0x00000004>;
        clocks = * 0xbbe2dd90 [0x00000050];
        clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_owa", "clk_pll_audio0_4x", "clk_pll_peri0_300", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_owa_tx", "clk_owa_rx";
        dmas = <0x0000009e 0x00000002 0x0000009e 0x00000002>;
        dma-names = "tx", "rx";
        playback-cma = <0x00000080>;
        capture-cma = <0x00000080>;
        tx-fifo-size = <0x00000080>;
        rx-fifo-size = <0x00000080>;
        status = "disabled";
        phandle = <0x000000e7>;
        };
      owa_mach
        {
        compatible = "allwinner,sunxi-snd-mach";
        soundcard-mach,name = "sndowa";
        status = "disabled";
        phandle = <0x000001fa>;
        soundcard-mach,cpu
          {
          sound-dai = <0x000000e7>;
          };
        soundcard-mach,codec
          {
          };
        };
      dmic_plat@7111000
        {
        #sound-dai-cells = <0x00000000>;
        compatible = "allwinner,sunxi-snd-plat-dmic";
        reg = <0x00000000 0x07111000 0x00000000 0x00000050>;
        resets = <0x00000070 0x00000005>;
        clocks = <0x0000001a 0x00000002 0x0000001a 0x000000b5 0x00000070 0x00000004 0x00000070 0x00000012 0x0000001a 0x00000026 0x00000070 0x00000001 0x00000070 0x00000002 0x00000070 0x00000011>;
        clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_dmic", "clk_pll_audio0_4x", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_dmic";
        dmas = <0x0000009e 0x00000008>;
        dma-names = "rx";
        capture-cma = <0x00000080>;
        rx-fifo-size = <0x00000080>;
        status = "disabled";
        phandle = <0x000000e8>;
        };
      dmic_mach
        {
        compatible = "allwinner,sunxi-snd-mach";
        soundcard-mach,name = "snddmic";
        soundcard-mach,capture-only;
        status = "disabled";
        phandle = <0x000001fb>;
        soundcard-mach,cpu
          {
          sound-dai = <0x000000e8>;
          };
        soundcard-mach,codec
          {
          };
        };
      i2s0_plat@7112000
        {
        #sound-dai-cells = <0x00000000>;
        compatible = "allwinner,sunxi-snd-plat-i2s";
        reg = <0x00000000 0x07112000 0x00000000 0x000000a0>;
        resets = <0x00000070 0x00000003>;
        clocks = <0x0000001a 0x00000002 0x0000001a 0x000000b5 0x00000070 0x00000004 0x00000070 0x0000000a 0x0000001a 0x00000026 0x00000070 0x00000001 0x00000070 0x00000002 0x00000070 0x00000005>;
        clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_i2s", "clk_pll_audio0_4x", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_i2s";
        dmas = <0x0000009e 0x00000003 0x0000009e 0x00000003>;
        dma-names = "tx", "rx";
        playback-cma = <0x00000080>;
        capture-cma = <0x00000080>;
        tx-fifo-size = <0x00000080>;
        rx-fifo-size = <0x00000080>;
        status = "disabled";
        phandle = <0x000000e9>;
        };
      i2s0_mach
        {
        compatible = "allwinner,sunxi-snd-mach";
        soundcard-mach,name = "sndi2s0";
        soundcard-mach,format = "i2s";
        soundcard-mach,slot-num = <0x00000002>;
        soundcard-mach,slot-width = <0x00000020>;
        status = "disabled";
        phandle = <0x000001fc>;
        soundcard-mach,cpu
          {
          sound-dai = <0x000000e9>;
          };
        soundcard-mach,codec
          {
          };
        };
      i2s1_plat@7113000
        {
        #sound-dai-cells = <0x00000000>;
        compatible = "allwinner,sunxi-snd-plat-i2s";
        reg = <0x00000000 0x07113000 0x00000000 0x000000a0>;
        resets = <0x00000070 0x00000002>;
        clocks = <0x0000001a 0x00000002 0x0000001a 0x000000b5 0x00000070 0x00000004 0x00000070 0x0000000b 0x0000001a 0x00000026 0x00000070 0x00000001 0x00000070 0x00000002 0x00000070 0x00000006>;
        clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_i2s", "clk_pll_audio0_4x", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_i2s";
        dmas = <0x0000009e 0x00000004 0x0000009e 0x00000004>;
        dma-names = "tx", "rx";
        playback-cma = <0x00000080>;
        capture-cma = <0x00000080>;
        tx-fifo-size = <0x00000080>;
        rx-fifo-size = <0x00000080>;
        status = "disabled";
        phandle = <0x000000ea>;
        };
      i2s1_mach
        {
        compatible = "allwinner,sunxi-snd-mach";
        soundcard-mach,name = "sndi2s1";
        soundcard-mach,format = "i2s";
        soundcard-mach,slot-num = <0x00000002>;
        soundcard-mach,slot-width = <0x00000020>;
        status = "disabled";
        phandle = <0x000001fd>;
        soundcard-mach,cpu
          {
          sound-dai = <0x000000ea>;
          };
        soundcard-mach,codec
          {
          };
        };
      i2s2_plat@7114000
        {
        #sound-dai-cells = <0x00000000>;
        compatible = "allwinner,sunxi-snd-plat-i2s";
        reg = <0x00000000 0x07114000 0x00000000 0x000000a0>;
        resets = <0x00000070 0x00000001>;
        clocks = <0x0000001a 0x00000002 0x0000001a 0x000000b5 0x00000070 0x00000004 0x00000070 0x0000000c 0x0000001a 0x00000026 0x00000070 0x00000001 0x00000070 0x00000002 0x00000070 0x00000007>;
        clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_i2s", "clk_pll_audio0_4x", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_i2s";
        dmas = <0x0000009e 0x00000005 0x0000009e 0x00000005>;
        dma-names = "tx", "rx";
        playback-cma = <0x00000080>;
        capture-cma = <0x00000080>;
        tx-fifo-size = <0x00000080>;
        rx-fifo-size = <0x00000080>;
        status = "okay";
        tdm-num = <0x00000002>;
        tx-pin = <0x00000000 0x00000001 0x00000002 0x00000003>;
        tx-pin0-map0 = <0x76543210>;
        tx-pin0-map1 = <0xfedcba98>;
        tx-pin1-map0 = <0x76543210>;
        tx-pin1-map1 = <0xfedcba98>;
        tx-pin2-map0 = <0x76543210>;
        tx-pin2-map1 = <0xfedcba98>;
        tx-pin3-map0 = <0x76543210>;
        tx-pin3-map1 = <0xfedcba98>;
        rx-pin = <0x00000000>;
        tx-hub-en;
        rx-sync-en;
        dai-type = "hdmi";
        phandle = <0x000000ec>;
        };
      i2s2_mach
        {
        compatible = "allwinner,sunxi-snd-mach";
        soundcard-mach,name = "sndhdmi";
        soundcard-mach,format = "i2s";
        soundcard-mach,slot-num = <0x00000002>;
        soundcard-mach,slot-width = <0x00000020>;
        status = "okay";
        soundcard-mach,frame-master = <0x000000eb>;
        soundcard-mach,bitclock-master = <0x000000eb>;
        soundcard-mach,playback-only;
        phandle = <0x000001fe>;
        soundcard-mach,cpu
          {
          sound-dai = <0x000000ec>;
          soundcard-mach,pll-fs = <0x00000001>;
          soundcard-mach,mclk-fs = <0x00000000>;
          phandle = <0x000000eb>;
          };
        soundcard-mach,codec
          {
          sound-dai = <0x000000ed>;
          phandle = <0x000001ff>;
          };
        };
      i2s3_plat@7115000
        {
        #sound-dai-cells = <0x00000000>;
        compatible = "allwinner,sunxi-snd-plat-i2s";
        reg = <0x00000000 0x07115000 0x00000000 0x000000a0>;
        resets = <0x00000070 0x00000000>;
        clocks = * 0xbbe2ed14 [0x00000050];
        clock-names = "clk_pll_peri0_2x", "clk_dsp_src", "clk_dsp_core", "clk_bus_i2s", "clk_pll_audio0_4x", "clk_pll_peri0_300", "clk_pll_audio1_div2", "clk_pll_audio1_div5", "clk_i2s_asrc", "clk_i2s";
        dmas = <0x0000009e 0x00000006 0x0000009e 0x00000006>;
        dma-names = "tx", "rx";
        playback-cma = <0x00000080>;
        capture-cma = <0x00000080>;
        tx-fifo-size = <0x00000080>;
        rx-fifo-size = <0x00000080>;
        status = "disabled";
        phandle = <0x000000ee>;
        };
      i2s3_mach
        {
        compatible = "allwinner,sunxi-snd-mach";
        soundcard-mach,name = "sndi2s3";
        soundcard-mach,format = "i2s";
        soundcard-mach,slot-num = <0x00000002>;
        soundcard-mach,slot-width = <0x00000020>;
        status = "disabled";
        phandle = <0x00000200>;
        soundcard-mach,cpu
          {
          sound-dai = <0x000000ee>;
          };
        soundcard-mach,codec
          {
          };
        };
      rfkill
        {
        compatible = "allwinner,sunxi-rfkill";
        status = "okay";
        pinctrl-0;
        pinctrl-names;
        phandle = <0x00000201>;
        wlan
          {
          compatible = "allwinner,sunxi-wlan";
          clocks = <0x00000023 0x00000008>;
          clock-names = "osc32k-out";
          wlan_power = "axp2202-bldo1";
          wlan_power_vol = <0x001b7740>;
          wlan_busnum = <0x00000001>;
          wlan_regon = <0x0000005a 0x00000001 0x00000001 0x00000000>;
          wlan_hostwake = <0x0000005a 0x00000001 0x00000000 0x00000000>;
          wakeup-source;
          };
        bt
          {
          compatible = "allwinner,sunxi-bt";
          clocks = <0x00000023 0x00000008>;
          clock-names = "osc32k-out";
          bt_power = "axp2202-bldo1";
          bt_power_vol = <0x001b7740>;
          bt_rst_n = <0x0000005a 0x00000001 0x00000002 0x00000000>;
          };
        };
      addr_mgt
        {
        addr_eth1 = "08:ef:6c:c7:b4:d7";
        addr_eth = "08:ef:6c:c7:b4:d6";
        compatible = "allwinner,sunxi-addr_mgt";
        status = "okay";
        type_addr_wifi = <0x00000000>;
        type_addr_bt = <0x00000000>;
        type_addr_eth = <0x00000000>;
        phandle = <0x00000202>;
        };
      btlpm
        {
        compatible = "allwinner,sunxi-btlpm";
        status = "okay";
        uart_index = <0x00000001>;
        bt_wake = <0x0000005a 0x00000001 0x00000003 0x00000000>;
        bt_hostwake = <0x0000005a 0x00000001 0x00000004 0x00000000>;
        wakeup-source;
        phandle = <0x00000203>;
        };
      mdio0@4500048
        {
        compatible = "allwinner,sunxi-mdio";
        #address-cells = <0x00000001>;
        #size-cells = <0x00000000>;
        reg = <0x00000000 0x04500048 0x00000000 0x00000008>;
        status = "okay";
        phandle = <0x00000204>;
        ethernet-phy@1
          {
          reg = <0x00000001>;
          max-speed = <0x000003e8>;
          reset-gpios = <0x00000059 0x00000007 0x00000008 0x00000001>;
          reset-assert-us = <0x00002710>;
          reset-deassert-us = <0x000249f0>;
          phandle = <0x000000ef>;
          };
        };
      gmac0@4500000
        {
        compatible = "allwinner,sunxi-gmac";
        reg = <0x00000000 0x04500000 0x00000000 0x00010000 0x00000000 0x03000030 0x00000000 0x00000004>;
        interrupts = <0x00000000 0x0000002e 0x00000004>;
        interrupt-names = "gmacirq";
        clocks = <0x0000001a 0x0000007e 0x0000001a 0x0000007b>;
        clock-names = "gmac", "phy25m";
        resets = <0x0000001a 0x0000002a>;
        phy-handle = <0x000000ef>;
        status = "okay";
        phy-mode = "rgmii";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x000000f0>;
        pinctrl-1 = <0x000000f1>;
        sunxi,phy-clk-type = <0x00000000>;
        tx-delay = <0x00000002>;
        rx-delay = <0x00000004>;
        gmac3v3-supply = <0x0000005d>;
        phandle = <0x00000205>;
        };
      ethernet@4510000
        {
        compatible = "allwinner,sunxi-gmac-200", "snps,dwmac-4.20a";
        reg = <0x00000000 0x04510000 0x00000000 0x00010000 0x00000000 0x03000034 0x00000000 0x00000004>;
        interrupts = <0x00000000 0x0000002f 0x00000004>;
        interrupt-names = "macirq";
        clocks = <0x0000001a 0x0000007d 0x0000001a 0x00000052 0x0000001a 0x0000007c>;
        clock-names = "stmmaceth", "pclk", "phy25m";
        resets = <0x0000001a 0x00000029>;
        reset-names = "stmmaceth";
        phy-handle = <0x000000f2>;
        power-domains = <0x0000001f 0x00000004>;
        status = "okay";
        snps,fixed-burst;
        snps,axi-config = <0x000000f3>;
        snps,mtl-rx-config = <0x000000f4>;
        snps,mtl-tx-config = <0x000000f5>;
        phy-mode = "rgmii";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <0x000000f6>;
        pinctrl-1 = <0x000000f7>;
        aw,soc-phy25m;
        tx-delay = <0x00000003>;
        rx-delay = <0x00000004>;
        dwmac3v3-supply = <0x0000005d>;
        phandle = <0x00000206>;
        stmmac-axi-config
          {
          snps,wr_osr_lmt = <0x0000000f>;
          snps,rd_osr_lmt = <0x0000000f>;
          snps,blen = <0x00000100 0x00000080 0x00000040 0x00000020 0x00000010 0x00000008 0x00000004>;
          phandle = <0x000000f3>;
          };
        rx-queues-config
          {
          snps,rx-queues-to-use = <0x00000001>;
          phandle = <0x000000f4>;
          queue0
            {
            };
          };
        tx_queues-config
          {
          snps,tx-queues-to-use = <0x00000001>;
          phandle = <0x000000f5>;
          queue0
            {
            };
          };
        mdio1@1
          {
          compatible = "snps,dwmac-mdio";
          #address-cells = <0x00000001>;
          #size-cells = <0x00000000>;
          status = "okay";
          phandle = <0x00000207>;
          ethernet-phy@1
            {
            compatible = "ethernet-phy-ieee802.3-c22";
            reg = <0x00000001>;
            max-speed = <0x000003e8>;
            reset-gpios = <0x00000059 0x00000009 0x00000010 0x00000001>;
            reset-assert-us = <0x00002710>;
            reset-deassert-us = <0x000249f0>;
            phandle = <0x000000f2>;
            };
          };
        };
      ioserial@0
        {
        compatible = "allwinner,ioserial-100";
        tx-gpios = <0x00000059 0x00000001 0x0000000b 0x00000000>;
        status = "disabled";
        };
      sid@3006000
        {
        compatible = "allwinner,sun55iw3p1-sid", "allwinner,sunxi-sid";
        reg = <0x00000000 0x03006000 0x00000000 0x00001000>;
        #address-cells = <0x00000001>;
        #size-cells = <0x00000001>;
        non-secure-maxoffset = <0x00000080>;
        non-secure-maxlen = <0x00000020>;
        secure_status
          {
          reg = <0x00000000 0x00000000>;
          offset = <0x000000a0>;
          size = <0x00000004>;
          };
        chipid
          {
          reg = <0x00000000 0x00000000>;
          offset = <0x00000200>;
          size = <0x00000010>;
          };
        rotpk
          {
          reg = <0x00000000 0x00000000>;
          offset = <0x00000140>;
          size = <0x00000020>;
          };
        };
      sram_ctrl@3000000
        {
        compatible = "allwinner,sram_ctrl";
        reg = <0x00000000 0x03000000 0x00000000 0x00000184>;
        phandle = <0x00000208>;
        soc_ver
          {
          offset = <0x00000024>;
          mask = <0x00000007>;
          shift = <0x00000000>;
          ver_a = <0x00000000>;
          ver_b = <0x00000001>;
          ver_c = <0x00000002>;
          };
        soc_id
          {
          offset = <0x00000200>;
          mask = <0x00000001>;
          shift = <0x00000016>;
          };
        soc_bin
          {
          offset = <0x00000000>;
          mask = <0x000003ff>;
          shift = <0x00000000>;
          };
        };
      auto_print@54321
        {
        reg = <0x00000000 0x00054321 0x00000000 0x00000000>;
        device_type = "auto_print";
        status = "okay";
        };
      hall_para
        {
        hall_name = "mh248";
        status = "okay";
        hall_int_port = <0x0000005a 0x00000000 0x00000009 0x00000001>;
        };
      };
    usb1-vbus
      {
      compatible = "regulator-fixed";
      regulator-name = "usb1-vbus";
      regulator-min-microvolt = <0x004c4b40>;
      regulator-max-microvolt = <0x004c4b40>;
      regulator-enable-ramp-delay = <0x000003e8>;
      gpio = <0x0000005a 0x00000000 0x00000008 0x00000000>;
      enable-active-high;
      phandle = <0x000000c6>;
      };
    pcie-3v3
      {
      compatible = "regulator-fixed";
      regulator-name = "pcie-3v3";
      regulator-min-microvolt = <0x00325aa0>;
      regulator-max-microvolt = <0x00325aa0>;
      regulator-enable-ramp-delay = <0x000003e8>;
      regulator-always-on;
      regulator-boot-on;
      gpio = <0x0000005a 0x00000000 0x0000000b 0x00000000>;
      enable-active-high;
      phandle = <0x000000e2>;
      };
    pcie-1v8
      {
      compatible = "regulator-fixed";
      regulator-name = "pcie-1v8";
      regulator-min-microvolt = <0x00325aa0>;
      regulator-max-microvolt = <0x00325aa0>;
      regulator-enable-ramp-delay = <0x000003e8>;
      regulator-always-on;
      regulator-boot-on;
      phandle = <0x000000e3>;
      };
    gma340-oe
      {
      compatible = "regulator-fixed";
      regulator-name = "gma340-oe";
      regulator-min-microvolt = <0x00325aa0>;
      regulator-max-microvolt = <0x00325aa0>;
      regulator-always-on;
      regulator-boot-on;
      gpio = <0x00000059 0x00000001 0x00000007 0x00000001>;
      phandle = <0x00000209>;
      };
    gma340-pcie
      {
      compatible = "regulator-fixed";
      regulator-name = "gma340-pcie";
      regulator-min-microvolt = <0x00325aa0>;
      regulator-max-microvolt = <0x00325aa0>;
      regulator-always-on;
      regulator-boot-on;
      gpio = <0x00000059 0x00000001 0x00000006 0x00000000>;
      enable-active-high;
      phandle = <0x0000020a>;
      };
    reg-backlight
      {
      compatible = "regulator-fixed";
      regulator-name = "reg-backlight";
      regulator-min-microvolt = <0x00325aa0>;
      regulator-max-microvolt = <0x00325aa0>;
      regulator-always-on;
      regulator-boot-on;
      gpio = <0x00000059 0x00000003 0x00000017 0x00000000>;
      enable-active-high;
      phandle = <0x000000f8>;
      };
    reg-vcc-tp
      {
      compatible = "regulator-fixed";
      regulator-name = "reg-vcc-tp";
      regulator-min-microvolt = <0x00325aa0>;
      regulator-max-microvolt = <0x00325aa0>;
      regulator-always-on;
      regulator-boot-on;
      gpio = <0x00000059 0x00000009 0x00000013 0x00000001>;
      phandle = <0x0000009d>;
      };
    vcc-3v3
      {
      compatible = "regulator-fixed";
      regulator-name = "vcc-3v3";
      regulator-min-microvolt = <0x00325aa0>;
      regulator-max-microvolt = <0x00325aa0>;
      gpio = <0x0000005a 0x00000000 0x00000007 0x00000000>;
      regulator-always-on;
      regulator-boot-on;
      enable-active-high;
      phandle = <0x000000fa>;
      };
    standby_param
      {
      vdd-cpu = <0x00000001>;
      vdd-cpub = <0x00000001>;
      vdd-ndr = <0x00000004>;
      vdd-sys = <0x00000002>;
      vcc-pll = <0x00000080>;
      vcc-io = <0x00004000>;
      osc24m-on = <0x00000000>;
      phandle = <0x0000020b>;
      };
    arisc_config
      {
      phandle = <0x0000020c>;
      s_uart_config
        {
        pins = "pl2", "pl3";
        function = <0x00000002 0x00000002>;
        status = "disabled";
        };
      };
    leds
      {
      compatible = "gpio-leds";
      led-0
        {
        label = "radxa:green:power";
        gpios = <0x0000005a 0x00000000 0x00000004 0x00000001>;
        };
      led-1
        {
        label = "radxa:blue:user";
        gpios = <0x0000005a 0x00000000 0x00000005 0x00000001>;
        linux,default-trigger = "heartbeat";
        };
      };
    backlight0
      {
      compatible = "pwm-backlight";
      power-supply = <0x000000f8>;
      brightness-levels = * 0xbbe305ec [0x00000400];
      default-brightness-level = <0x000000c8>;
      pwms = <0x000000f9 0x00000001 0x0000c350 0x00000001>;
      phandle = <0x000000fb>;
      };
    panel_0@0
      {
      compatible = "allwinner,panel-dsi";
      status = "okay";
      reg = <0x00000000>;
      power0-supply = <0x000000fa>;
      power1-supply = <0x000000a3>;
      reset-gpios = <0x00000059 0x00000009 0x00000012 0x00000000>;
      reset-num = <0x00000001>;
      reset-delay-ms = <0x00000014>;
      width-mm = <0x00000087>;
      height-mm = <0x000000d8>;
      backlight = <0x000000fb>;
      dsi,lanes = <0x00000004>;
      dsi,format = <0x00000000>;
      panel-init-sequence = * 0xbbe30b38 [0x00000355];
      panel-exit-sequence = <0x05000128 0x05000110>;
      phandle = <0x0000020d>;
      display-timings
        {
        native-mode = <0x000000fc>;
        phandle = <0x0000020e>;
        timing0
          {
          clock-frequency = <0x042c1d80>;
          hback-porch = <0x00000012>;
          hactive = <0x00000320>;
          hfront-porch = <0x00000012>;
          hsync-len = <0x00000012>;
          vback-porch = <0x0000000a>;
          vactive = <0x00000500>;
          vfront-porch = <0x00000014>;
          vsync-len = <0x00000004>;
          phandle = <0x000000fc>;
          };
        };
      port
        {
        endpoint@0
          {
          reg = <0x00000000>;
          remote-endpoint = <0x000000fd>;
          phandle = <0x0000004b>;
          };
        };
      };
    __symbols__
      {
      reg_vdd_sys = "/ vdd-sys";
      cpu0 = "/ cpus/ cpu@0";
      cpu1 = "/ cpus/ cpu@100";
      cpu2 = "/ cpus/ cpu@200";
      cpu3 = "/ cpus/ cpu@300";
      cpu4 = "/ cpus/ cpu@400";
      cpu5 = "/ cpus/ cpu@500";
      cpu6 = "/ cpus/ cpu@600";
      cpu7 = "/ cpus/ cpu@700";
      cpu_sleep_0 = "/ cpus/ idle-states/ cpu-sleep-0";
      cluster_sleep_0 = "/ cpus/ idle-states/ cluster-sleep-0";
      vf_mapping_table = "/ vf_mapping_table";
      gpu_vf_mapping_table = "/ gpu_vf_mapping_table";
      npu_vf_mapping_table = "/ npu_vf_mapping_table";
      cluster0_opp_table = "/ cluster0-opp-table";
      cluster1_opp_table = "/ cluster1-opp-table";
      dsufreq = "/ dsufreq@0";
      dsu_opp_table = "/ dsu-opp-table";
      cpul_thermal_zone = "/ thermal-zones/ cpul_thermal_zone";
      cpul_trips = "/ thermal-zones/ cpul_thermal_zone/ trips";
      cpul_threshold = "/ thermal-zones/ cpul_thermal_zone/ trips/ trip-point@0";
      cpul_target = "/ thermal-zones/ cpul_thermal_zone/ trips/ trip-point@1";
      cpul_crit = "/ thermal-zones/ cpul_thermal_zone/ trips/ cpu_crit@0";
      cpub_thermal_zone = "/ thermal-zones/ cpub_thermal_zone";
      cpub_trips = "/ thermal-zones/ cpub_thermal_zone/ trips";
      cpub_threshold = "/ thermal-zones/ cpub_thermal_zone/ trips/ trip-point@0";
      cpub_target = "/ thermal-zones/ cpub_thermal_zone/ trips/ trip-point@1";
      cpub_crit = "/ thermal-zones/ cpub_thermal_zone/ trips/ cpu_crit@0";
      gpu_thermal_zone = "/ thermal-zones/ gpu_thermal_zone";
      gpu_trips = "/ thermal-zones/ gpu_thermal_zone/ trips";
      gpu_threshold = "/ thermal-zones/ gpu_thermal_zone/ trips/ trip-point@0";
      gpu_target = "/ thermal-zones/ gpu_thermal_zone/ trips/ trip-point@1";
      gpu_crit = "/ thermal-zones/ gpu_thermal_zone/ trips/ gpu_crit@0";
      dcxo24m = "/ dcxo24m_clk";
      rc_16m = "/ rc16m_clk";
      ext_32k = "/ ext32k_clk";
      gic = "/ interrupt-controller@3400000";
      wakeupgen = "/ interrupt-controller@0";
      power = "/ power-management@7001400";
      pd = "/ power-management@7001400/ power-controller";
      pck = "/ pck-600@7060000";
      pd1 = "/ pck-600@7060000/ power-controller";
      nmi_intc = "/ intc-nmi@7010320";
      mmu_aw = "/ iommu@2010000";
      dram = "/ dram";
      ddr_clk = "/ clk_ddr";
      dram_opp_table = "/ opp_table";
      sunxi_dmcfreq = "/ dmcfreq@3120000";
      soc = "/ soc@3000000";
      ve = "/ soc@3000000/ ve@1c0e000";
      ve1 = "/ soc@3000000/ ve1@1c0e000";
      pd_ve_test = "/ soc@3000000/ pd-ve-test@0";
      pd_vi_test = "/ soc@3000000/ pd-vi-test@0";
      pd_vo0_test = "/ soc@3000000/ pd-vo0-test@0";
      pd_vo1_test = "/ soc@3000000/ pd-vo1-test@0";
      pd_de_test = "/ soc@3000000/ pd-de-test@0";
      pd_nand_test = "/ soc@3000000/ pd-nand-test@0";
      pd_pcie_test = "/ soc@3000000/ pd-pcie-test@0";
      pd_dsp_test = "/ soc@3000000/ pd-dsp-test@0";
      pd_npu_test = "/ soc@3000000/ pd-npu-test@0";
      pd_sram_test = "/ soc@3000000/ pd-sram-test@0";
      pd_riscv_test = "/ soc@3000000/ pd-riscv-test@0";
      test_ccu = "/ soc@3000000/ test_ccu@3000090";
      rtc_ccu = "/ soc@3000000/ rtc_ccu@7090000";
      cpupll_ccu = "/ soc@3000000/ clock@8817000";
      ccu = "/ soc@3000000/ ccu@2001000";
      r_ccu = "/ soc@3000000/ r_ccu@7010000";
      mcu_ccu = "/ soc@3000000/ mcu_ccu@7102000";
      sunxi_drm = "/ soc@3000000/ sunxi-drm";
      de = "/ soc@3000000/ de@5000000";
      disp0 = "/ soc@3000000/ de@5000000/ ports/ port@0";
      disp0_out_tcon0 = "/ soc@3000000/ de@5000000/ ports/ port@0/ endpoint@0";
      disp0_out_tcon1 = "/ soc@3000000/ de@5000000/ ports/ port@0/ endpoint@1";
      disp0_out_tcon2 = "/ soc@3000000/ de@5000000/ ports/ port@0/ endpoint@2";
      disp0_out_tcon3 = "/ soc@3000000/ de@5000000/ ports/ port@0/ endpoint@3";
      disp0_out_tcon4 = "/ soc@3000000/ de@5000000/ ports/ port@0/ endpoint@4";
      disp1 = "/ soc@3000000/ de@5000000/ ports/ port@1";
      disp1_out_tcon0 = "/ soc@3000000/ de@5000000/ ports/ port@1/ endpoint@0";
      disp1_out_tcon1 = "/ soc@3000000/ de@5000000/ ports/ port@1/ endpoint@1";
      disp1_out_tcon2 = "/ soc@3000000/ de@5000000/ ports/ port@1/ endpoint@2";
      disp1_out_tcon3 = "/ soc@3000000/ de@5000000/ ports/ port@1/ endpoint@3";
      disp1_out_tcon4 = "/ soc@3000000/ de@5000000/ ports/ port@1/ endpoint@4";
      vo0 = "/ soc@3000000/ vo0@5500000";
      vo1 = "/ soc@3000000/ vo1@5730000";
      dlcd0 = "/ soc@3000000/ tcon0@5501000";
      tcon0_in = "/ soc@3000000/ tcon0@5501000/ ports/ port@0";
      tcon0_in_disp0 = "/ soc@3000000/ tcon0@5501000/ ports/ port@0/ endpoint@0";
      tcon0_in_disp1 = "/ soc@3000000/ tcon0@5501000/ ports/ port@0/ endpoint@1";
      tcon0_out = "/ soc@3000000/ tcon0@5501000/ ports/ port@1";
      tcon0_out_lvds0 = "/ soc@3000000/ tcon0@5501000/ ports/ port@1/ endpoint@0";
      tcon0_out_dsi0 = "/ soc@3000000/ tcon0@5501000/ ports/ port@1/ endpoint@1";
      tcon0_out_dsi1 = "/ soc@3000000/ tcon0@5501000/ ports/ port@1/ endpoint@2";
      tcon0_out_rgb0 = "/ soc@3000000/ tcon0@5501000/ ports/ port@1/ endpoint@3";
      dlcd1 = "/ soc@3000000/ tcon1@5502000";
      tcon1_in = "/ soc@3000000/ tcon1@5502000/ ports/ port@0";
      tcon1_in_disp0 = "/ soc@3000000/ tcon1@5502000/ ports/ port@0/ endpoint@0";
      tcon1_in_disp1 = "/ soc@3000000/ tcon1@5502000/ ports/ port@0/ endpoint@1";
      tcon1_out = "/ soc@3000000/ tcon1@5502000/ ports/ port@1";
      tcon1_out_dsi1 = "/ soc@3000000/ tcon1@5502000/ ports/ port@1/ endpoint@0";
      dlcd2 = "/ soc@3000000/ tcon4@5731000";
      tcon4_in = "/ soc@3000000/ tcon4@5731000/ ports/ port@0";
      tcon4_in_disp0 = "/ soc@3000000/ tcon4@5731000/ ports/ port@0/ endpoint@0";
      tcon4_in_disp1 = "/ soc@3000000/ tcon4@5731000/ ports/ port@0/ endpoint@1";
      tcon4_out = "/ soc@3000000/ tcon4@5731000/ ports/ port@1";
      tcon4_out_lvds1 = "/ soc@3000000/ tcon4@5731000/ ports/ port@1/ endpoint@0";
      tcon4_out_rgb1 = "/ soc@3000000/ tcon4@5731000/ ports/ port@1/ endpoint@1";
      lvds0 = "/ soc@3000000/ lvds0@0001000";
      lvds0_in = "/ soc@3000000/ lvds0@0001000/ ports/ port@0";
      lvds0_in_tcon0 = "/ soc@3000000/ lvds0@0001000/ ports/ port@0/ endpoint@0";
      lvds1 = "/ soc@3000000/ lvds1@0001000";
      lvds1_in = "/ soc@3000000/ lvds1@0001000/ ports/ port@0";
      lvds1_in_tcon4 = "/ soc@3000000/ lvds1@0001000/ ports/ port@0/ endpoint@0";
      rgb0 = "/ soc@3000000/ rgb0@0001000";
      rgb0_in = "/ soc@3000000/ rgb0@0001000/ ports/ port@0";
      rgb0_in_tcon0 = "/ soc@3000000/ rgb0@0001000/ ports/ port@0/ endpoint@0";
      rgb1 = "/ soc@3000000/ rgb1@0001000";
      rgb1_in = "/ soc@3000000/ rgb1@0001000/ ports/ port@0";
      rgb1_in_tcon4 = "/ soc@3000000/ rgb1@0001000/ ports/ port@0/ endpoint@0";
      dsi0combophy = "/ soc@3000000/ phy@5507000";
      dsi0 = "/ soc@3000000/ dsi0@5506000";
      dsi0_in = "/ soc@3000000/ dsi0@5506000/ ports/ port@0";
      dsi0_in_tcon0 = "/ soc@3000000/ dsi0@5506000/ ports/ port@0/ endpoint@0";
      dsi1combophy = "/ soc@3000000/ phy@5509000";
      dsi1 = "/ soc@3000000/ dsi1@5508000";
      dsi1_in = "/ soc@3000000/ dsi1@5508000/ ports/ port@0";
      dsi1_in_tcon1 = "/ soc@3000000/ dsi1@5508000/ ports/ port@0/ endpoint@0";
      dsi1_in_tcon0 = "/ soc@3000000/ dsi1@5508000/ ports/ port@0/ endpoint@1";
      dsi1_out = "/ soc@3000000/ dsi1@5508000/ ports/ port@1";
      dsi1_out_panel = "/ soc@3000000/ dsi1@5508000/ ports/ port@1/ endpoint";
      panel = "/ soc@3000000/ dsi1@5508000/ panel@0";
      panel_in = "/ soc@3000000/ dsi1@5508000/ panel@0/ ports/ port@0";
      panel_input = "/ soc@3000000/ dsi1@5508000/ panel@0/ ports/ port@0/ endpoint@0";
      panel_out = "/ soc@3000000/ dsi1@5508000/ panel@0/ ports/ port@1";
      panel_output_0 = "/ soc@3000000/ dsi1@5508000/ panel@0/ ports/ port@1/ endpoint@0";
      tv0 = "/ soc@3000000/ tcon2@5503000";
      tcon2_in = "/ soc@3000000/ tcon2@5503000/ ports/ port@0";
      tcon2_in_disp0 = "/ soc@3000000/ tcon2@5503000/ ports/ port@0/ endpoint@0";
      tcon2_in_disp1 = "/ soc@3000000/ tcon2@5503000/ ports/ port@0/ endpoint@1";
      tcon2_out = "/ soc@3000000/ tcon2@5503000/ ports/ port@1";
      tcon2_out_hdmi = "/ soc@3000000/ tcon2@5503000/ ports/ port@1/ endpoint@0";
      hdmi = "/ soc@3000000/ hdmi@5520000";
      hdmi_in = "/ soc@3000000/ hdmi@5520000/ ports/ port@0";
      hdmi_in_tcon2 = "/ soc@3000000/ hdmi@5520000/ ports/ port@0/ endpoint@0";
      tv1 = "/ soc@3000000/ tcon3@5504000";
      tcon3_in = "/ soc@3000000/ tcon3@5504000/ ports/ port@0";
      tcon3_in_disp0 = "/ soc@3000000/ tcon3@5504000/ ports/ port@0/ endpoint@0";
      tcon3_in_disp1 = "/ soc@3000000/ tcon3@5504000/ ports/ port@0/ endpoint@1";
      tcon3_out = "/ soc@3000000/ tcon3@5504000/ ports/ port@1";
      tcon3_out_edp = "/ soc@3000000/ tcon3@5504000/ ports/ port@1/ endpoint@0";
      drm_edp = "/ soc@3000000/ drm_edp@5720000";
      edp_in = "/ soc@3000000/ drm_edp@5720000/ ports/ port@0";
      edp_in_tcon3 = "/ soc@3000000/ drm_edp@5720000/ ports/ port@0/ endpoint@0";
      edp_out = "/ soc@3000000/ drm_edp@5720000/ ports/ port@1";
      disp = "/ soc@3000000/ disp@5000000";
      edp0 = "/ soc@3000000/ edp0@5720000";
      lcd0 = "/ soc@3000000/ lcd0@1c0c000";
      lcd1 = "/ soc@3000000/ lcd1@1c0c000";
      lcd2 = "/ soc@3000000/ lcd2@1c0c000";
      r_pio = "/ soc@3000000/ pinctrl@7022000";
      uart8_pins_a = "/ soc@3000000/ pinctrl@7022000/ uart8_pins@0";
      uart8_pins_b = "/ soc@3000000/ pinctrl@7022000/ uart8_pins@1";
      uart9_pins_a = "/ soc@3000000/ pinctrl@7022000/ uart9_pins@0";
      uart9_pins_b = "/ soc@3000000/ pinctrl@7022000/ uart9_pins@1";
      s_twi0_pins_default = "/ soc@3000000/ pinctrl@7022000/ s_twi0@0";
      s_twi0_pins_sleep = "/ soc@3000000/ pinctrl@7022000/ s_twi0@1";
      s_irrx_pins_default = "/ soc@3000000/ pinctrl@7022000/ s_irrx@0";
      s_irrx_pins_sleep = "/ soc@3000000/ pinctrl@7022000/ s_irrx@1";
      g2d = "/ soc@3000000/ g2d@5440000";
      pio = "/ soc@3000000/ pinctrl@2000000";
      sdc0_pins_a = "/ soc@3000000/ pinctrl@2000000/ sdc0@0";
      sdc0_pins_b = "/ soc@3000000/ pinctrl@2000000/ sdc0@1";
      sdc0_pins_c = "/ soc@3000000/ pinctrl@2000000/ sdc0@2";
      sdc0_pins_d = "/ soc@3000000/ pinctrl@2000000/ sdc0@3";
      sdc0_pins_e = "/ soc@3000000/ pinctrl@2000000/ sdc0@4";
      sdc1_pins_a = "/ soc@3000000/ pinctrl@2000000/ sdc1@0";
      sdc1_pins_b = "/ soc@3000000/ pinctrl@2000000/ sdc1@1";
      sdc1_pins_c = "/ soc@3000000/ pinctrl@2000000/ sdc1@2";
      sdc2_pins_a = "/ soc@3000000/ pinctrl@2000000/ sdc2@0";
      sdc2_pins_b = "/ soc@3000000/ pinctrl@2000000/ sdc2@1";
      sdc2_pins_c = "/ soc@3000000/ pinctrl@2000000/ sdc2@2";
      uart1_pins_a = "/ soc@3000000/ pinctrl@2000000/ uart1@0";
      uart1_pins_b = "/ soc@3000000/ pinctrl@2000000/ uart1@1";
      dsi0_4lane_pins_a = "/ soc@3000000/ pinctrl@2000000/ dsi0_4lane@0";
      dsi0_4lane_pins_b = "/ soc@3000000/ pinctrl@2000000/ dsi0_4lane@1";
      dsi1_4lane_pins_a = "/ soc@3000000/ pinctrl@2000000/ dsi1_4lane@0";
      dsi1_4lane_pins_b = "/ soc@3000000/ pinctrl@2000000/ dsi1_4lane@1";
      rgb18_pins_a = "/ soc@3000000/ pinctrl@2000000/ rgb18@0";
      rgb18_pins_b = "/ soc@3000000/ pinctrl@2000000/ rgb18@1";
      lvds0_pins_a = "/ soc@3000000/ pinctrl@2000000/ lvds0@0";
      lvds0_pins_b = "/ soc@3000000/ pinctrl@2000000/ lvds0@1";
      lvds1_pins_a = "/ soc@3000000/ pinctrl@2000000/ lvds1@0";
      lvds1_pins_b = "/ soc@3000000/ pinctrl@2000000/ lvds1@1";
      lvds2_pins_a = "/ soc@3000000/ pinctrl@2000000/ lvds2@0";
      lvds2_pins_b = "/ soc@3000000/ pinctrl@2000000/ lvds2@1";
      lvds3_pins_a = "/ soc@3000000/ pinctrl@2000000/ lvds3@0";
      lvds3_pins_b = "/ soc@3000000/ pinctrl@2000000/ lvds3@1";
      rgb1_24pins_a = "/ soc@3000000/ pinctrl@2000000/ rgb1@0";
      rgb1_24pins_b = "/ soc@3000000/ pinctrl@2000000/ rgb1@1";
      rgb0_24pins_a = "/ soc@3000000/ pinctrl@2000000/ rgb0@0";
      rgb0_24pins_b = "/ soc@3000000/ pinctrl@2000000/ rgb0@1";
      rgb0_18pins_a = "/ soc@3000000/ pinctrl@2000000/ rgb0@2";
      rgb0_18pins_b = "/ soc@3000000/ pinctrl@2000000/ rgb0@3";
      csi_mclk0_pins_a = "/ soc@3000000/ pinctrl@2000000/ csi_mclk0@0";
      csi_mclk0_pins_b = "/ soc@3000000/ pinctrl@2000000/ csi_mclk0@1";
      csi_mclk1_pins_a = "/ soc@3000000/ pinctrl@2000000/ csi_mclk1@0";
      csi_mclk1_pins_b = "/ soc@3000000/ pinctrl@2000000/ csi_mclk1@1";
      csi_mclk2_pins_a = "/ soc@3000000/ pinctrl@2000000/ csi_mclk2@0";
      csi_mclk2_pins_b = "/ soc@3000000/ pinctrl@2000000/ csi_mclk2@1";
      csi_mclk3_pins_a = "/ soc@3000000/ pinctrl@2000000/ csi_mclk3@0";
      csi_mclk3_pins_b = "/ soc@3000000/ pinctrl@2000000/ csi_mclk3@1";
      ncsi_bt656_pins_a = "/ soc@3000000/ pinctrl@2000000/ ncsi_bt656@0";
      ncsi_bt656_pins_b = "/ soc@3000000/ pinctrl@2000000/ ncsi_bt656@1";
      ncsi_bt1120_pins_a = "/ soc@3000000/ pinctrl@2000000/ ncsi_bt1120@0";
      ncsi_bt1120_pins_b = "/ soc@3000000/ pinctrl@2000000/ ncsi_bt1120@1";
      mipia_pins_a = "/ soc@3000000/ pinctrl@2000000/ mipia@0";
      mipia_pins_b = "/ soc@3000000/ pinctrl@2000000/ mipia@1";
      mipib_pins_a = "/ soc@3000000/ pinctrl@2000000/ mipib@0";
      mipib_pins_b = "/ soc@3000000/ pinctrl@2000000/ mipib@1";
      mipib_4lane_pins_a = "/ soc@3000000/ pinctrl@2000000/ mipib_4lane@0";
      mipib_4lane_pins_b = "/ soc@3000000/ pinctrl@2000000/ mipib_4lane@1";
      mipic_pins_a = "/ soc@3000000/ pinctrl@2000000/ mipic@0";
      mipic_pins_b = "/ soc@3000000/ pinctrl@2000000/ mipic@1";
      mipid_pins_a = "/ soc@3000000/ pinctrl@2000000/ mipid@0";
      mipid_pins_b = "/ soc@3000000/ pinctrl@2000000/ mipid@1";
      mipid_4lane_pins_a = "/ soc@3000000/ pinctrl@2000000/ mipid_4lane@0";
      mipid_4lane_pins_b = "/ soc@3000000/ pinctrl@2000000/ mipid_4lane@1";
      test_pins_a = "/ soc@3000000/ pinctrl@2000000/ test_pins@0";
      test_pins_b = "/ soc@3000000/ pinctrl@2000000/ test_pins@1";
      uart0_pins_a = "/ soc@3000000/ pinctrl@2000000/ uart0_pins@0";
      uart0_pins_b = "/ soc@3000000/ pinctrl@2000000/ uart0_pins@1";
      uart2_pins_a = "/ soc@3000000/ pinctrl@2000000/ uart2_pins@0";
      uart2_pins_b = "/ soc@3000000/ pinctrl@2000000/ uart2_pins@1";
      uart3_pins_a = "/ soc@3000000/ pinctrl@2000000/ uart3_pins@0";
      uart3_pins_b = "/ soc@3000000/ pinctrl@2000000/ uart3_pins@1";
      uart4_pins_a = "/ soc@3000000/ pinctrl@2000000/ uart4_pins@0";
      uart4_pins_b = "/ soc@3000000/ pinctrl@2000000/ uart4_pins@1";
      uart5_pins_a = "/ soc@3000000/ pinctrl@2000000/ uart5_pins@0";
      uart5_pins_b = "/ soc@3000000/ pinctrl@2000000/ uart5_pins@1";
      uart6_pins_a = "/ soc@3000000/ pinctrl@2000000/ uart6_pins@0";
      uart6_pins_b = "/ soc@3000000/ pinctrl@2000000/ uart6_pins@1";
      uart7_pins_a = "/ soc@3000000/ pinctrl@2000000/ uart7_pins@0";
      uart7_pins_b = "/ soc@3000000/ pinctrl@2000000/ uart7_pins@1";
      pwm0_1_pin_active = "/ soc@3000000/ pinctrl@2000000/ pwm0_1@0";
      pwm0_1_pin_sleep = "/ soc@3000000/ pinctrl@2000000/ pwm0_1@1";
      ledc_pins_a = "/ soc@3000000/ pinctrl@2000000/ ledc@0";
      ledc_pins_b = "/ soc@3000000/ pinctrl@2000000/ ledc@1";
      irrx_pins_default = "/ soc@3000000/ pinctrl@2000000/ irrx@0";
      irrx_pins_sleep = "/ soc@3000000/ pinctrl@2000000/ irrx@1";
      irtx_pins_default = "/ soc@3000000/ pinctrl@2000000/ irtx@0";
      irtx_pins_sleep = "/ soc@3000000/ pinctrl@2000000/ irtx@1";
      twi0_pins_default = "/ soc@3000000/ pinctrl@2000000/ twi0@0";
      twi0_pins_sleep = "/ soc@3000000/ pinctrl@2000000/ twi0@1";
      twi1_pins_default = "/ soc@3000000/ pinctrl@2000000/ twi1@0";
      twi1_pins_sleep = "/ soc@3000000/ pinctrl@2000000/ twi1@1";
      twi4_pins_default = "/ soc@3000000/ pinctrl@2000000/ twi4@0";
      twi4_pins_sleep = "/ soc@3000000/ pinctrl@2000000/ twi4@1";
      twi5_pins_default = "/ soc@3000000/ pinctrl@2000000/ twi5@0";
      twi5_pins_sleep = "/ soc@3000000/ pinctrl@2000000/ twi5@1";
      ncsi_pins_a = "/ soc@3000000/ pinctrl@2000000/ ncsi@0";
      ncsi_pins_b = "/ soc@3000000/ pinctrl@2000000/ ncsi@1";
      i2s1_pins_a = "/ soc@3000000/ pinctrl@2000000/ i2s1@0";
      i2s1_pins_b = "/ soc@3000000/ pinctrl@2000000/ i2s1@1";
      i2s1_pins_c = "/ soc@3000000/ pinctrl@2000000/ i2s1@2";
      i2s1_pins_d = "/ soc@3000000/ pinctrl@2000000/ i2s1@3";
      owa_pins_a = "/ soc@3000000/ pinctrl@2000000/ owa@0";
      owa_pins_b = "/ soc@3000000/ pinctrl@2000000/ owa@1";
      spi0_pins_default = "/ soc@3000000/ pinctrl@2000000/ spi0@0";
      spi0_pins_cs = "/ soc@3000000/ pinctrl@2000000/ spi0@1";
      spi0_pins_sleep = "/ soc@3000000/ pinctrl@2000000/ spi0@2";
      i2s0_pins_a = "/ soc@3000000/ pinctrl@2000000/ i2s0@0";
      i2s0_pins_b = "/ soc@3000000/ pinctrl@2000000/ i2s0@1";
      i2s0_pins_c = "/ soc@3000000/ pinctrl@2000000/ i2s0@2";
      i2s0_pins_d = "/ soc@3000000/ pinctrl@2000000/ i2s0@3";
      gmac0_pins_default = "/ soc@3000000/ pinctrl@2000000/ gmac0@0";
      gmac0_pins_sleep = "/ soc@3000000/ pinctrl@2000000/ gmac0@1";
      gmac1_pins_default = "/ soc@3000000/ pinctrl@2000000/ gmac1@0";
      gmac1_pins_sleep = "/ soc@3000000/ pinctrl@2000000/ gmac1@1";
      pinctrl_test = "/ soc@3000000/ pinctrl_test@2000000";
      ths0 = "/ soc@3000000/ ths0@200a000";
      ths1 = "/ soc@3000000/ ths0@2009400";
      soc_timer0 = "/ soc@3000000/ timer@3008000";
      dump_reg = "/ soc@3000000/ dump_reg@40000";
      soft_jtag_master = "/ soc@3000000/ soft_jtag_master@0";
      reg_pio1_8 = "/ soc@3000000/ pio-18";
      reg_pio2_8 = "/ soc@3000000/ pio-28";
      reg_pio3_3 = "/ soc@3000000/ pio-33";
      uart0 = "/ soc@3000000/ uart@2500000";
      uart1 = "/ soc@3000000/ uart@2500400";
      uart2 = "/ soc@3000000/ uart@2500800";
      uart3 = "/ soc@3000000/ uart@2500c00";
      uart4 = "/ soc@3000000/ uart@2501000";
      uart5 = "/ soc@3000000/ uart@2501400";
      uart6 = "/ soc@3000000/ uart@2501800";
      uart7 = "/ soc@3000000/ uart@2501c00";
      uart8 = "/ soc@3000000/ uart@7080000";
      uart9 = "/ soc@3000000/ uart@7080400";
      dma = "/ soc@3000000/ dma-controller@3002000";
      dma1 = "/ soc@3000000/ dma1-controller@7121000";
      npu = "/ soc@3000000/ npu@7122000";
      npu_opp_table = "/ soc@3000000/ npu-opp-table";
      npu_opp_table_546 = "/ soc@3000000/ npu-opp-table/ opp-546";
      npu_opp_table_696 = "/ soc@3000000/ npu-opp-table/ opp-696";
      wdt = "/ soc@3000000/ watchdog@2050000";
      gpadc0 = "/ soc@3000000/ gpadc0@2009000";
      gpadc1 = "/ soc@3000000/ gpadc1@2009c00";
      dsp0_rproc = "/ soc@3000000/ dsp0_rproc@0";
      e906_rproc = "/ soc@3000000/ e906_rproc@7130000";
      msgbox = "/ soc@3000000/ msgbox@3003000";
      hwspinlock = "/ soc@3000000/ hwspinlock@3005000";
      pwm0 = "/ soc@3000000/ pwm0@2000c00";
      pwm0_0 = "/ soc@3000000/ pwm0_0@2000c10";
      pwm0_1 = "/ soc@3000000/ pwm0_1@2000c11";
      pwm0_2 = "/ soc@3000000/ pwm0_2@2000c12";
      pwm0_3 = "/ soc@3000000/ pwm0_3@2000c13";
      pwm0_4 = "/ soc@3000000/ pwm0_4@2000c14";
      pwm0_5 = "/ soc@3000000/ pwm0_5@2000c15";
      pwm0_6 = "/ soc@3000000/ pwm0_6@2000c16";
      pwm0_7 = "/ soc@3000000/ pwm0_7@2000c17";
      pwm0_8 = "/ soc@3000000/ pwm0_8@2000c18";
      pwm0_9 = "/ soc@3000000/ pwm0_9@2000c19";
      pwm0_10 = "/ soc@3000000/ pwm0_10@2000c1a";
      pwm0_11 = "/ soc@3000000/ pwm0_11@2000c1b";
      pwm0_12 = "/ soc@3000000/ pwm0_12@2000c1c";
      pwm0_13 = "/ soc@3000000/ pwm0_13@2000c1d";
      pwm0_14 = "/ soc@3000000/ pwm0_14@2000c1e";
      pwm0_15 = "/ soc@3000000/ pwm0_15@2000c1f";
      pwm1 = "/ soc@3000000/ pwm1@2051000";
      pwm1_0 = "/ soc@3000000/ pwm1_0@2051010";
      pwm1_1 = "/ soc@3000000/ pwm1_1@2051011";
      pwm1_2 = "/ soc@3000000/ pwm1_2@2051012";
      pwm1_3 = "/ soc@3000000/ pwm1_3@2051013";
      s_pwm0 = "/ soc@3000000/ s_pwm0@7020c00";
      s_pwm0_0 = "/ soc@3000000/ s_pwm0_0@7020c10";
      s_pwm0_1 = "/ soc@3000000/ s_pwm0_1@7020c11";
      mcu_pwm0 = "/ soc@3000000/ mcu_pwm0@7103000";
      mcu_pwm0_0 = "/ soc@3000000/ mcu_pwm0_0@7103010";
      mcu_pwm0_1 = "/ soc@3000000/ mcu_pwm0_1@7103020";
      mcu_pwm0_2 = "/ soc@3000000/ mcu_pwm0_2@7103030";
      mcu_pwm0_3 = "/ soc@3000000/ mcu_pwm0_3@7103040";
      mcu_pwm0_4 = "/ soc@3000000/ mcu_pwm0_4@7103050";
      mcu_pwm0_5 = "/ soc@3000000/ mcu_pwm0_5@7103060";
      mcu_pwm0_6 = "/ soc@3000000/ mcu_pwm0_6@7103070";
      mcu_pwm0_7 = "/ soc@3000000/ mcu_pwm0_7@7103080";
      ledc = "/ soc@3000000/ ledc@2008000";
      irrx = "/ soc@3000000/ irrx@2005000";
      s_irrx = "/ soc@3000000/ s_irrx@7040000";
      irtx = "/ soc@3000000/ irtx@2003000";
      twi0 = "/ soc@3000000/ twi0@2502000";
      twi1 = "/ soc@3000000/ twi1@2502400";
      twi2 = "/ soc@3000000/ twi2@2502800";
      twi3 = "/ soc@3000000/ twi3@2502c00";
      twi4 = "/ soc@3000000/ twi4@2503000";
      twi5 = "/ soc@3000000/ twi5@2503400";
      twi6 = "/ soc@3000000/ s_twi0@7081400";
      axp1530 = "/ soc@3000000/ s_twi0@7081400/ axp1530@36";
      reg_ext_axp1530_dcdc1 = "/ soc@3000000/ s_twi0@7081400/ axp1530@36/ regulators/ dcdc1";
      reg_ext_axp1530_dcdc2 = "/ soc@3000000/ s_twi0@7081400/ axp1530@36/ regulators/ dcdc2";
      reg_ext_axp1530_dcdc3 = "/ soc@3000000/ s_twi0@7081400/ axp1530@36/ regulators/ dcdc3";
      reg_ext_axp1530_aldo1 = "/ soc@3000000/ s_twi0@7081400/ axp1530@36/ regulators/ ldo1";
      reg_ext_axp1530_dldo1 = "/ soc@3000000/ s_twi0@7081400/ axp1530@36/ regulators/ ldo2";
      pmu0 = "/ soc@3000000/ s_twi0@7081400/ pmu@34";
      usb_power_supply = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ usb_power_supply";
      gpio_power_supply = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ gpio_power_supply";
      powerkey0 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ powerkey@0";
      regulator0 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0";
      reg_dcdc1 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ dcdc1";
      reg_dcdc2 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ dcdc2";
      reg_dcdc3 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ dcdc3";
      reg_dcdc4 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ dcdc4";
      reg_rtcldo = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ rtcldo";
      reg_aldo1 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ aldo1";
      reg_aldo2 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ aldo2";
      reg_aldo3 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ aldo3";
      reg_aldo4 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ aldo4";
      reg_bldo1 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ bldo1";
      reg_bldo2 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ bldo2";
      reg_bldo3 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ bldo3";
      reg_bldo4 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ bldo4";
      reg_cldo1 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ cldo1";
      reg_cldo2 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ cldo2";
      reg_cldo3 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ cldo3";
      reg_cldo4 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ cldo4";
      reg_cpusldo = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ cpusldo";
      reg_vmid = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ vmid";
      reg_drivevbus = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ regulators@0/ drivevbus";
      axp_gpio0 = "/ soc@3000000/ s_twi0@7081400/ pmu@34/ axp_gpio@0";
      twi7 = "/ soc@3000000/ s_twi1@7081800";
      twi8 = "/ soc@3000000/ s_twi2@7081c00";
      spi0 = "/ soc@3000000/ spi@4025000";
      spi1 = "/ soc@3000000/ spi@4026000";
      spi2 = "/ soc@3000000/ spi@4027000";
      r_spi0 = "/ soc@3000000/ spi@7092000";
      spif0 = "/ soc@3000000/ spif@47f0000";
      nand0 = "/ soc@3000000/ nand0@4011000";
      lradc = "/ soc@3000000/ lradc@2009800";
      nsi0 = "/ soc@3000000/ nsi-controller@2020000";
      npd0 = "/ soc@3000000/ npd@2070000";
      cryptoengine = "/ soc@3000000/ ce@3040000";
      rtc = "/ soc@3000000/ rtc@7090000";
      sdc2 = "/ soc@3000000/ sdmmc@4022000";
      sdc0 = "/ soc@3000000/ sdmmc@4020000";
      sdc1 = "/ soc@3000000/ sdmmc@4021000";
      usbc0 = "/ soc@3000000/ usbc0@10";
      udc = "/ soc@3000000/ udc-controller@4100000";
      ehci0 = "/ soc@3000000/ ehci0-controller@4101000";
      ohci0 = "/ soc@3000000/ ohci0-controller@4101400";
      usbc1 = "/ soc@3000000/ usbc1@11";
      ehci1 = "/ soc@3000000/ ehci1-controller@4200000";
      ohci1 = "/ soc@3000000/ ohci1-controller@4200400";
      usbc2 = "/ soc@3000000/ usbc2@12";
      xhci2 = "/ soc@3000000/ usbc2@12/ xhci2-controller@4d00000";
      u2phy = "/ soc@3000000/ phy@4e00000";
      vind0 = "/ soc@3000000/ vind@5800800";
      csi0 = "/ soc@3000000/ vind@5800800/ csi@5820000";
      csi1 = "/ soc@3000000/ vind@5800800/ csi@5821000";
      csi2 = "/ soc@3000000/ vind@5800800/ csi@5822000";
      csi3 = "/ soc@3000000/ vind@5800800/ csi@5823000";
      mipi0 = "/ soc@3000000/ vind@5800800/ mipi@5810100";
      mipi1 = "/ soc@3000000/ vind@5800800/ mipi@5810200";
      mipi2 = "/ soc@3000000/ vind@5800800/ mipi@5810300";
      mipi3 = "/ soc@3000000/ vind@5800800/ mipi@5810400";
      tdm0 = "/ soc@3000000/ vind@5800800/ tdm@5908000";
      isp00 = "/ soc@3000000/ vind@5800800/ isp@5900000";
      isp01 = "/ soc@3000000/ vind@5800800/ isp@58ffffc";
      isp02 = "/ soc@3000000/ vind@5800800/ isp@58ffff8";
      isp03 = "/ soc@3000000/ vind@5800800/ isp@58ffff4";
      isp10 = "/ soc@3000000/ vind@5800800/ isp@4";
      isp20 = "/ soc@3000000/ vind@5800800/ isp@5";
      isp30 = "/ soc@3000000/ vind@5800800/ isp@6";
      scaler00 = "/ soc@3000000/ vind@5800800/ scaler@5910000";
      scaler01 = "/ soc@3000000/ vind@5800800/ scaler@590fffc";
      scaler02 = "/ soc@3000000/ vind@5800800/ scaler@590fff8";
      scaler03 = "/ soc@3000000/ vind@5800800/ scaler@590fff4";
      scaler10 = "/ soc@3000000/ vind@5800800/ scaler@5910400";
      scaler11 = "/ soc@3000000/ vind@5800800/ scaler@59103fc";
      scaler12 = "/ soc@3000000/ vind@5800800/ scaler@59103f8";
      scaler13 = "/ soc@3000000/ vind@5800800/ scaler@59103f4";
      scaler20 = "/ soc@3000000/ vind@5800800/ scaler@5910800";
      scaler21 = "/ soc@3000000/ vind@5800800/ scaler@59107fc";
      scaler22 = "/ soc@3000000/ vind@5800800/ scaler@59107f8";
      scaler23 = "/ soc@3000000/ vind@5800800/ scaler@59107f4";
      scaler30 = "/ soc@3000000/ vind@5800800/ scaler@5910c00";
      scaler31 = "/ soc@3000000/ vind@5800800/ scaler@5910bfc";
      scaler32 = "/ soc@3000000/ vind@5800800/ scaler@5910bf8";
      scaler33 = "/ soc@3000000/ vind@5800800/ scaler@5910bf4";
      scaler40 = "/ soc@3000000/ vind@5800800/ scaler@16";
      scaler50 = "/ soc@3000000/ vind@5800800/ scaler@17";
      actuator0 = "/ soc@3000000/ vind@5800800/ actuator@2108180";
      flash0 = "/ soc@3000000/ vind@5800800/ flash@2108190";
      sensor0 = "/ soc@3000000/ vind@5800800/ sensor@5812000";
      sensor1 = "/ soc@3000000/ vind@5800800/ sensor@5812010";
      sensor2 = "/ soc@3000000/ vind@5800800/ sensor@5812020";
      sensor3 = "/ soc@3000000/ vind@5800800/ sensor@5812030";
      sensor_list0 = "/ soc@3000000/ vind@5800800/ sensor_list@5812040";
      sensor_list1 = "/ soc@3000000/ vind@5800800/ sensor_list@5812050";
      vinc00 = "/ soc@3000000/ vind@5800800/ vinc@5830000";
      vinc01 = "/ soc@3000000/ vind@5800800/ vinc@582fffc";
      vinc02 = "/ soc@3000000/ vind@5800800/ vinc@582fff8";
      vinc03 = "/ soc@3000000/ vind@5800800/ vinc@582fff4";
      vinc10 = "/ soc@3000000/ vind@5800800/ vinc@5831000";
      vinc11 = "/ soc@3000000/ vind@5800800/ vinc@5830ffc";
      vinc12 = "/ soc@3000000/ vind@5800800/ vinc@5830ff8";
      vinc13 = "/ soc@3000000/ vind@5800800/ vinc@5830ff4";
      vinc20 = "/ soc@3000000/ vind@5800800/ vinc@5832000";
      vinc21 = "/ soc@3000000/ vind@5800800/ vinc@5831ffc";
      vinc22 = "/ soc@3000000/ vind@5800800/ vinc@5831ff8";
      vinc23 = "/ soc@3000000/ vind@5800800/ vinc@5831ff4";
      vinc30 = "/ soc@3000000/ vind@5800800/ vinc@5833000";
      vinc31 = "/ soc@3000000/ vind@5800800/ vinc@5832ffc";
      vinc32 = "/ soc@3000000/ vind@5800800/ vinc@5832ff8";
      vinc33 = "/ soc@3000000/ vind@5800800/ vinc@5832ff4";
      vinc40 = "/ soc@3000000/ vind@5800800/ vinc@5834000";
      vinc50 = "/ soc@3000000/ vind@5800800/ vinc@5835000";
      di = "/ soc@3000000/ deinterlace@5400000";
      gpu = "/ soc@3000000/ gpu@1800000";
      ipa_dvfs = "/ soc@3000000/ gpu@1800000/ ipa_dvfs";
      gpu_opp_table = "/ soc@3000000/ gpu-opp-table";
      combophy = "/ soc@3000000/ phy@4f00000";
      pcie = "/ soc@3000000/ pcie@4800000";
      codec = "/ soc@3000000/ codec@7110000";
      codec_plat = "/ soc@3000000/ codec_plat";
      codec_mach = "/ soc@3000000/ codec_mach";
      hdmi_codec = "/ soc@3000000/ hdmi_codec";
      edp_codec = "/ soc@3000000/ edp_codec";
      owa_plat = "/ soc@3000000/ owa_plat@7116000";
      owa_mach = "/ soc@3000000/ owa_mach";
      dmic_plat = "/ soc@3000000/ dmic_plat@7111000";
      dmic_mach = "/ soc@3000000/ dmic_mach";
      i2s0_plat = "/ soc@3000000/ i2s0_plat@7112000";
      i2s0_mach = "/ soc@3000000/ i2s0_mach";
      i2s1_plat = "/ soc@3000000/ i2s1_plat@7113000";
      i2s1_mach = "/ soc@3000000/ i2s1_mach";
      i2s2_plat = "/ soc@3000000/ i2s2_plat@7114000";
      i2s2_mach = "/ soc@3000000/ i2s2_mach";
      i2s2_cpu = "/ soc@3000000/ i2s2_mach/ soundcard-mach,cpu";
      i2s2_codec = "/ soc@3000000/ i2s2_mach/ soundcard-mach,codec";
      i2s3_plat = "/ soc@3000000/ i2s3_plat@7115000";
      i2s3_mach = "/ soc@3000000/ i2s3_mach";
      rfkill = "/ soc@3000000/ rfkill";
      addr_mgt = "/ soc@3000000/ addr_mgt";
      btlpm = "/ soc@3000000/ btlpm";
      mdio0 = "/ soc@3000000/ mdio0@4500048";
      gmac0_phy0 = "/ soc@3000000/ mdio0@4500048/ ethernet-phy@1";
      gmac0 = "/ soc@3000000/ gmac0@4500000";
      gmac1 = "/ soc@3000000/ ethernet@4510000";
      gmac1_stmmac_axi_setup = "/ soc@3000000/ ethernet@4510000/ stmmac-axi-config";
      gmac1_mtl_rx_setup = "/ soc@3000000/ ethernet@4510000/ rx-queues-config";
      gmac1_mtl_tx_setup = "/ soc@3000000/ ethernet@4510000/ tx_queues-config";
      mdio1 = "/ soc@3000000/ ethernet@4510000/ mdio1@1";
      gmac1_phy0 = "/ soc@3000000/ ethernet@4510000/ mdio1@1/ ethernet-phy@1";
      sram_ctrl = "/ soc@3000000/ sram_ctrl@3000000";
      reg_usb1_vbus = "/ usb1-vbus";
      reg_pcie_3v3 = "/ pcie-3v3";
      tmp_pcie_1v8 = "/ pcie-1v8";
      gma340_oe = "/ gma340-oe";
      gma340_pcie = "/ gma340-pcie";
      reg_backlight = "/ reg-backlight";
      reg_vcc_tp = "/ reg-vcc-tp";
      reg_vcc_3v3 = "/ vcc-3v3";
      standby_param = "/ standby_param";
      arisc_config = "/ arisc_config";
      backlight0 = "/ backlight0";
      panel_0 = "/ panel_0@0";
      disp_timings0 = "/ panel_0@0/ display-timings";
      dsi1_timing0 = "/ panel_0@0/ display-timings/ timing0";
      panel0_in = "/ panel_0@0/ port/ endpoint@0";
      };
    };
=>
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